[PATCH 02/21] drm/amdgpu:fix golden init for sriov

[Monk Liu]

although only vi supports SRIOV now,but we shouldn't
make code has such assumption.

Change-Id: Ie73c185dc2e7f64756253045b32cabe70d618d19
Signed-off-by: Monk Liu <Monk.Liu at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/vi.c | 11 ++++-------
 1 file changed, 4 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index 89b0dfe..7810030 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -274,12 +274,6 @@ static void vi_init_golden_registers(struct amdgpu_device *adev)
 	/* Some of the registers might be dependent on GRBM_GFX_INDEX */
 	mutex_lock(&adev->grbm_idx_mutex);
 
-	if (amdgpu_sriov_vf(adev)) {
-		xgpu_vi_init_golden_registers(adev);
-		mutex_unlock(&adev->grbm_idx_mutex);
-		return;
-	}
-
 	switch (adev->asic_type) {
 	case CHIP_TOPAZ:
 		amdgpu_program_register_sequence(adev,
@@ -292,7 +286,10 @@ static void vi_init_golden_registers(struct amdgpu_device *adev)
 						 (const u32)ARRAY_SIZE(fiji_mgcg_cgcg_init));
 		break;
 	case CHIP_TONGA:
-		amdgpu_program_register_sequence(adev,
+		if (amdgpu_sriov_vf(adev))
+			xgpu_vi_init_golden_registers(adev);
+		else
+			amdgpu_program_register_sequence(adev,
 						 tonga_mgcg_cgcg_init,
 						 (const u32)ARRAY_SIZE(tonga_mgcg_cgcg_init));
 		break;
-- 
2.7.4