[PATCH] Fix SMC read/write
Tom St Denis
tstdenis82 at gmail.com
Mon Feb 13 16:25:42 UTC 2017
The registers in umr are stored as byte addresses
(mm registers are word addresses).
Signed-off-by: Tom St Denis <tom.stdenis at amd.com>
---
src/app/scan.c | 2 +-
src/app/set_bit.c | 2 +-
src/app/set_reg.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/app/scan.c b/src/app/scan.c
index afcadc4c507e..19c97fe1499d 100644
--- a/src/app/scan.c
+++ b/src/app/scan.c
@@ -55,7 +55,7 @@ int umr_scan_asic(struct umr_asic *asic, char *asicname, char *ipname, char *reg
case REG_PCIE: fd = asic->fd.pcie; scale = 1; break;
case REG_SMC:
if (options.read_smc) {
- fd = asic->fd.smc; scale = 4;
+ fd = asic->fd.smc; scale = 1;
} else {
continue;
}
diff --git a/src/app/set_bit.c b/src/app/set_bit.c
index 899bf1a17459..d9ee7d8f3a55 100644
--- a/src/app/set_bit.c
+++ b/src/app/set_bit.c
@@ -61,7 +61,7 @@ int umr_set_register_bit(struct umr_asic *asic, char *regpath, char *regvalue)
case REG_MMIO: fd = asic->fd.mmio; scale = 4; break;
case REG_DIDT: fd = asic->fd.didt; scale = 1; break;
case REG_PCIE: fd = asic->fd.pcie; scale = 1; break;
- case REG_SMC: fd = asic->fd.smc; scale = 4; break;
+ case REG_SMC: fd = asic->fd.smc; scale = 1; break;
default: return -1;
}
if (asic->blocks[i]->grant) {
diff --git a/src/app/set_reg.c b/src/app/set_reg.c
index 8c5060f2dbe8..9861170d55c3 100644
--- a/src/app/set_reg.c
+++ b/src/app/set_reg.c
@@ -57,7 +57,7 @@ int umr_set_register(struct umr_asic *asic, char *regpath, char *regvalue)
case REG_MMIO: fd = asic->fd.mmio; scale = 4; break;
case REG_DIDT: fd = asic->fd.didt; scale = 1; break;
case REG_PCIE: fd = asic->fd.pcie; scale = 1; break;
- case REG_SMC: fd = asic->fd.smc; scale = 4; break;
+ case REG_SMC: fd = asic->fd.smc; scale = 1; break;
default: return -1;
}
--
2.11.0
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