[PATCH v2 1/1] drm/amdgpu: export gfx config by gpu info (v2)

Christian K├Ânig deathsimple at vodafone.de
Fri Feb 17 10:12:30 UTC 2017


Am 17.02.2017 um 06:05 schrieb Junwei Zhang:
> v2: move the config struct to drm_amdgpu_info_device
>
> Signed-off-by: Junwei Zhang <Jerry.Zhang at amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu.h     |  7 +++++++
>   drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c |  1 +
>   drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c   |  6 ++++++
>   drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c   |  6 ++++++
>   drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c   | 16 +++++++++++++++-
>   include/uapi/drm/amdgpu_drm.h           |  2 ++
>   6 files changed, 37 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 7f1421f..9204545 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -873,6 +873,10 @@ struct amdgpu_gfx_funcs {
>   	void (*read_wave_sgprs)(struct amdgpu_device *adev, uint32_t simd, uint32_t wave, uint32_t start, uint32_t size, uint32_t *dst);
>   };
>   
> +struct amdgpu_gfx_config {
> +	uint32_t double_offchip_lds_buf;
> +};
> +

Any specific reason why we can't add that to the existing 
amdgpu_gca_config structure?

Apart from that the patch looks good to me.

Regards,
Christian.

>   struct amdgpu_gfx {
>   	struct mutex			gpu_clock_mutex;
>   	struct amdgpu_gca_config	config;
> @@ -916,6 +920,9 @@ struct amdgpu_gfx {
>   	uint32_t                        grbm_soft_reset;
>   	uint32_t                        srbm_soft_reset;
>   	bool                            in_reset;
> +
> +	/* gfx config */
> +	struct amdgpu_gfx_config	gc;
>   };
>   
>   int amdgpu_ib_get(struct amdgpu_device *adev, struct amdgpu_vm *vm,
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> index 6b9bf0e..922ae3e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> @@ -545,6 +545,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
>   		dev_info.vram_type = adev->mc.vram_type;
>   		dev_info.vram_bit_width = adev->mc.vram_width;
>   		dev_info.vce_harvest_config = adev->vce.harvest_config;
> +		dev_info.gc_double_offchip_lds_buf = adev->gfx.gc.double_offchip_lds_buf;
>   
>   		return copy_to_user(out, &dev_info,
>   				    min((size_t)size, sizeof(dev_info))) ? -EFAULT : 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> index 782190d..b758283 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> @@ -1579,6 +1579,11 @@ static void gfx_v6_0_setup_spi(struct amdgpu_device *adev)
>   	mutex_unlock(&adev->grbm_idx_mutex);
>   }
>   
> +static void gfx_v6_0_config_init(struct amdgpu_device *adev)
> +{
> +	adev->gfx.gc.double_offchip_lds_buf = 1;
> +}
> +
>   static void gfx_v6_0_gpu_init(struct amdgpu_device *adev)
>   {
>   	u32 gb_addr_config = 0;
> @@ -1736,6 +1741,7 @@ static void gfx_v6_0_gpu_init(struct amdgpu_device *adev)
>   	gfx_v6_0_setup_spi(adev);
>   
>   	gfx_v6_0_get_cu_info(adev);
> +	gfx_v6_0_config_init(adev);
>   
>   	WREG32(mmCP_QUEUE_THRESHOLDS, ((0x16 << CP_QUEUE_THRESHOLDS__ROQ_IB1_START__SHIFT) |
>   				       (0x2b << CP_QUEUE_THRESHOLDS__ROQ_IB2_START__SHIFT)));
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> index 8e07a50..f0f0512 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> @@ -1876,6 +1876,11 @@ static void gmc_v7_0_init_compute_vmid(struct amdgpu_device *adev)
>   	mutex_unlock(&adev->srbm_mutex);
>   }
>   
> +static void gfx_v7_0_config_init(struct amdgpu_device *adev)
> +{
> +	adev->gfx.gc.double_offchip_lds_buf = 1;
> +}
> +
>   /**
>    * gfx_v7_0_gpu_init - setup the 3D engine
>    *
> @@ -1900,6 +1905,7 @@ static void gfx_v7_0_gpu_init(struct amdgpu_device *adev)
>   
>   	gfx_v7_0_setup_rb(adev);
>   	gfx_v7_0_get_cu_info(adev);
> +	gfx_v7_0_config_init(adev);
>   
>   	/* set HW defaults for 3D engine */
>   	WREG32(mmCP_MEQ_THRESHOLDS,
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index fdce3de..0b700b1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -3846,6 +3846,19 @@ static void gfx_v8_0_init_compute_vmid(struct amdgpu_device *adev)
>   	mutex_unlock(&adev->srbm_mutex);
>   }
>   
> +static void gfx_v8_0_config_init(struct amdgpu_device *adev)
> +{
> +	switch (adev->asic_type) {
> +	default:
> +		adev->gfx.gc.double_offchip_lds_buf = 1;
> +		break;
> +	case CHIP_CARRIZO:
> +	case CHIP_STONEY:
> +		adev->gfx.gc.double_offchip_lds_buf = 0;
> +		break;
> +	}
> +}
> +
>   static void gfx_v8_0_gpu_init(struct amdgpu_device *adev)
>   {
>   	u32 tmp, sh_static_mem_cfg;
> @@ -3859,6 +3872,7 @@ static void gfx_v8_0_gpu_init(struct amdgpu_device *adev)
>   	gfx_v8_0_tiling_mode_table_init(adev);
>   	gfx_v8_0_setup_rb(adev);
>   	gfx_v8_0_get_cu_info(adev);
> +	gfx_v8_0_config_init(adev);
>   
>   	/* XXX SH_MEM regs */
>   	/* where to put LDS, scratch, GPUVM in FSA64 space */
> @@ -7389,4 +7403,4 @@ static void gfx_v8_0_compute_mqd_soft_fini(struct amdgpu_device *adev)
>   
>   	ring = &adev->gfx.kiq.ring;
>   	amdgpu_bo_free_kernel(&ring->mqd_obj, &ring->mqd_gpu_addr, (void **)&ring->mqd_ptr);
> -}
> \ No newline at end of file
> +}
> diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
> index 64abc9b..a340669 100644
> --- a/include/uapi/drm/amdgpu_drm.h
> +++ b/include/uapi/drm/amdgpu_drm.h
> @@ -790,6 +790,8 @@ struct drm_amdgpu_info_device {
>   	__u32 vram_bit_width;
>   	/* vce harvesting instance */
>   	__u32 vce_harvest_config;
> +	/* gfx doulbe offchip LDS buffers */
> +	__u32 gc_double_offchip_lds_buf;
>   };
>   
>   struct drm_amdgpu_info_hw_ip {




More information about the amd-gfx mailing list