[PATCH V2] drm/amdgpu: Fix module unload hang by KIQ IRQ set
Yu, Xiangliang
Xiangliang.Yu at amd.com
Mon Feb 20 04:11:02 UTC 2017
Reviewed-by: Xiangliang Yu < Xiangliang.Yu at amd.com>
Thanks!
Xiangliang Yu
> -----Original Message-----
> From: Trigger Huang [mailto:trigger.huang at amd.com]
> Sent: Monday, February 20, 2017 11:03 AM
> To: amd-gfx at lists.freedesktop.org
> Cc: Liu, Monk <Monk.Liu at amd.com>; Yu, Xiangliang
> <Xiangliang.Yu at amd.com>; Huang, Trigger <Trigger.Huang at amd.com>
> Subject: [PATCH V2] drm/amdgpu: Fix module unload hang by KIQ IRQ set
>
> In some cases, manually insmod/rmmod amdgpu is necessary. When
> unloading amdgpu, the KIQ IRQ enable/disable function will case system
> hang. The root cause is, in the sequence of function amdgpu_fini, the sw_fini
> of IP block AMD_IP_BLOCK_TYPE_GFX will be invoked earlier than that of
> AMD_IP_BLOCK_TYPE_IH. So continue to use the variable freed by
> AMD_IP_BLOCK_TYPE_GFX will cause system hang.
>
> Changes in v2:
> -- Refine according to Xiangliang Yu's suggestions
>
> Signed-off-by: Trigger Huang <trigger.huang at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 10 ++++------
> 1 file changed, 4 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index 5a484ef..c417324 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -1395,7 +1395,6 @@ static int gfx_v8_0_kiq_init_ring(struct
> amdgpu_device *adev,
> ring->pipe = 1;
> }
>
> - irq->data = ring;
> ring->queue = 0;
> sprintf(ring->name, "kiq %d.%d.%d", ring->me, ring->pipe, ring-
> >queue);
> r = amdgpu_ring_init(adev, ring, 1024, @@ -1410,7 +1409,6 @@ static
> void gfx_v8_0_kiq_free_ring(struct amdgpu_ring *ring, {
> amdgpu_wb_free(ring->adev, ring->adev->virt.reg_val_offs);
> amdgpu_ring_fini(ring);
> - irq->data = NULL;
> }
>
> #define MEC_HPD_SIZE 2048
> @@ -6931,9 +6929,9 @@ static int gfx_v8_0_kiq_set_interrupt_state(struct
> amdgpu_device *adev,
> enum amdgpu_interrupt_state
> state) {
> uint32_t tmp, target;
> - struct amdgpu_ring *ring = (struct amdgpu_ring *)src->data;
> + struct amdgpu_ring *ring = &(adev->gfx.kiq.ring);
>
> - BUG_ON(!ring || (ring->funcs->type != AMDGPU_RING_TYPE_KIQ));
> + BUG_ON(ring->funcs->type != AMDGPU_RING_TYPE_KIQ);
>
> if (ring->me == 1)
> target = mmCP_ME1_PIPE0_INT_CNTL;
> @@ -6977,9 +6975,9 @@ static int gfx_v8_0_kiq_irq(struct amdgpu_device
> *adev,
> struct amdgpu_iv_entry *entry)
> {
> u8 me_id, pipe_id, queue_id;
> - struct amdgpu_ring *ring = (struct amdgpu_ring *)source->data;
> + struct amdgpu_ring *ring = &(adev->gfx.kiq.ring);
>
> - BUG_ON(!ring || (ring->funcs->type != AMDGPU_RING_TYPE_KIQ));
> + BUG_ON(ring->funcs->type != AMDGPU_RING_TYPE_KIQ);
>
> me_id = (entry->ring_id & 0x0c) >> 2;
> pipe_id = (entry->ring_id & 0x03) >> 0;
> --
> 2.7.4
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