[PATCH v3 1/1] drm/amdgpu: export gfx config double offchip LDS buffers (v3)

Deucher, Alexander Alexander.Deucher at amd.com
Tue Feb 21 14:48:20 UTC 2017


> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf
> Of Junwei Zhang
> Sent: Sunday, February 19, 2017 9:51 PM
> To: amd-gfx at lists.freedesktop.org
> Cc: Zhang, Jerry
> Subject: [PATCH v3 1/1] drm/amdgpu: export gfx config double offchip LDS
> buffers (v3)
> 
> v2: move the config struct to drm_amdgpu_info_device
> v3: move the config feature to amdgpu_gca_config
> 
> Signed-off-by: Junwei Zhang <Jerry.Zhang at amd.com>

Should bump the drm version as well in amdgpu_drv.c.  With that fixed:
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h     |  3 +++
>  drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c |  2 ++
>  drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c   |  6 ++++++
>  drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c   |  6 ++++++
>  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c   | 16 +++++++++++++++-
>  include/uapi/drm/amdgpu_drm.h           |  2 ++
>  6 files changed, 34 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 7f1421f..9c552a9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -856,6 +856,9 @@ struct amdgpu_gca_config {
>  	uint32_t macrotile_mode_array[16];
> 
>  	struct amdgpu_rb_config
> rb_config[AMDGPU_GFX_MAX_SE][AMDGPU_GFX_MAX_SH_PER_SE];
> +
> +	/* gfx configure feature */
> +	uint32_t double_offchip_lds_buf;
>  };
> 
>  struct amdgpu_cu_info {
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> index 6b9bf0e..bcc13907d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> @@ -545,6 +545,8 @@ static int amdgpu_info_ioctl(struct drm_device *dev,
> void *data, struct drm_file
>  		dev_info.vram_type = adev->mc.vram_type;
>  		dev_info.vram_bit_width = adev->mc.vram_width;
>  		dev_info.vce_harvest_config = adev->vce.harvest_config;
> +		dev_info.gc_double_offchip_lds_buf =
> +			adev->gfx.config.double_offchip_lds_buf;
> 
>  		return copy_to_user(out, &dev_info,
>  				    min((size_t)size, sizeof(dev_info))) ? -
> EFAULT : 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> index 782190d..138e15a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> @@ -1579,6 +1579,11 @@ static void gfx_v6_0_setup_spi(struct
> amdgpu_device *adev)
>  	mutex_unlock(&adev->grbm_idx_mutex);
>  }
> 
> +static void gfx_v6_0_config_init(struct amdgpu_device *adev)
> +{
> +	adev->gfx.config.double_offchip_lds_buf = 1;
> +}
> +
>  static void gfx_v6_0_gpu_init(struct amdgpu_device *adev)
>  {
>  	u32 gb_addr_config = 0;
> @@ -1736,6 +1741,7 @@ static void gfx_v6_0_gpu_init(struct
> amdgpu_device *adev)
>  	gfx_v6_0_setup_spi(adev);
> 
>  	gfx_v6_0_get_cu_info(adev);
> +	gfx_v6_0_config_init(adev);
> 
>  	WREG32(mmCP_QUEUE_THRESHOLDS, ((0x16 <<
> CP_QUEUE_THRESHOLDS__ROQ_IB1_START__SHIFT) |
>  				       (0x2b <<
> CP_QUEUE_THRESHOLDS__ROQ_IB2_START__SHIFT)));
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> index 8e07a50..6e7b273 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> @@ -1876,6 +1876,11 @@ static void gmc_v7_0_init_compute_vmid(struct
> amdgpu_device *adev)
>  	mutex_unlock(&adev->srbm_mutex);
>  }
> 
> +static void gfx_v7_0_config_init(struct amdgpu_device *adev)
> +{
> +	adev->gfx.config.double_offchip_lds_buf = 1;
> +}
> +
>  /**
>   * gfx_v7_0_gpu_init - setup the 3D engine
>   *
> @@ -1900,6 +1905,7 @@ static void gfx_v7_0_gpu_init(struct
> amdgpu_device *adev)
> 
>  	gfx_v7_0_setup_rb(adev);
>  	gfx_v7_0_get_cu_info(adev);
> +	gfx_v7_0_config_init(adev);
> 
>  	/* set HW defaults for 3D engine */
>  	WREG32(mmCP_MEQ_THRESHOLDS,
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index fdce3de..1533693 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -3846,6 +3846,19 @@ static void gfx_v8_0_init_compute_vmid(struct
> amdgpu_device *adev)
>  	mutex_unlock(&adev->srbm_mutex);
>  }
> 
> +static void gfx_v8_0_config_init(struct amdgpu_device *adev)
> +{
> +	switch (adev->asic_type) {
> +	default:
> +		adev->gfx.config.double_offchip_lds_buf = 1;
> +		break;
> +	case CHIP_CARRIZO:
> +	case CHIP_STONEY:
> +		adev->gfx.config.double_offchip_lds_buf = 0;
> +		break;
> +	}
> +}
> +
>  static void gfx_v8_0_gpu_init(struct amdgpu_device *adev)
>  {
>  	u32 tmp, sh_static_mem_cfg;
> @@ -3859,6 +3872,7 @@ static void gfx_v8_0_gpu_init(struct
> amdgpu_device *adev)
>  	gfx_v8_0_tiling_mode_table_init(adev);
>  	gfx_v8_0_setup_rb(adev);
>  	gfx_v8_0_get_cu_info(adev);
> +	gfx_v8_0_config_init(adev);
> 
>  	/* XXX SH_MEM regs */
>  	/* where to put LDS, scratch, GPUVM in FSA64 space */
> @@ -7389,4 +7403,4 @@ static void
> gfx_v8_0_compute_mqd_soft_fini(struct amdgpu_device *adev)
> 
>  	ring = &adev->gfx.kiq.ring;
>  	amdgpu_bo_free_kernel(&ring->mqd_obj, &ring->mqd_gpu_addr,
> (void **)&ring->mqd_ptr);
> -}
> \ No newline at end of file
> +}
> diff --git a/include/uapi/drm/amdgpu_drm.h
> b/include/uapi/drm/amdgpu_drm.h
> index 64abc9b..0849592 100644
> --- a/include/uapi/drm/amdgpu_drm.h
> +++ b/include/uapi/drm/amdgpu_drm.h
> @@ -790,6 +790,8 @@ struct drm_amdgpu_info_device {
>  	__u32 vram_bit_width;
>  	/* vce harvesting instance */
>  	__u32 vce_harvest_config;
> +	/* gfx double offchip LDS buffers */
> +	__u32 gc_double_offchip_lds_buf;
>  };
> 
>  struct drm_amdgpu_info_hw_ip {
> --
> 1.9.1
> 
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