[PATCH] drm/amdgpu/virt: don't check VALID bit for FLR completion message

[Yu, Xiangliang]

> The interrupt after FLR is missed sometimes due to hardware reason, so
> guest driver get the notification of FLR completion via polling message. Then
> host doesn't write VALID bit to avoid sending interrupt, otherwise the
> completion will be handled twice.
> 
> So there's a valid message without VALID bit for FLR completion, driver
> should handle it without checking.
> 
> Signed-off-by: Pixel Ding <Pixel.Ding at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c
> b/drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c
> index 3164d61..285d54c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c
> @@ -369,7 +369,7 @@ static int xgpu_vi_mailbox_rcv_msg(struct
> amdgpu_device *adev,
>  	u32 mask = REG_FIELD_MASK(MAILBOX_CONTROL,
> RCV_MSG_VALID);
> 
>  	reg = RREG32_NO_KIQ(mmMAILBOX_CONTROL);
> -	if (!(reg & mask))
> +	if (!(reg & mask) && (event != IDH_FLR_NOTIFICATION_CMPL))
>  		return -ENOENT;

Small nitpick: better to move event check to top and add a comment. 

>  	reg = RREG32_NO_KIQ(mmMAILBOX_MSGBUF_RCV_DW0);
> --
> 2.7.4
> 
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