[PART1 PATCH 0/8] Introduce a method to get clock gating status dynamically

[StDenis, Tom]

Some of them are part of AON tiles but are unstable during PM switches.  That's why the debugfs mmio entry supports a PM lock.


So they might be readable while powered off but unstable if the firmware is in the middle of a PM switch.


Tom


________________________________
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> on behalf of Deucher, Alexander <Alexander.Deucher at amd.com>
Sent: Thursday, January 5, 2017 10:40
To: Huang, Ray; amd-gfx at lists.freedesktop.org
Cc: Huang, Ray; Zhang, Hawking; Zhu, Rex; Fu, Ping; Mao, David
Subject: RE: [PART1 PATCH 0/8] Introduce a method to get clock gating status dynamically

> -----Original Message-----
> From: Huang Rui [mailto:ray.huang at amd.com]
> Sent: Thursday, January 05, 2017 8:50 AM
> To: Deucher, Alexander; amd-gfx at lists.freedesktop.org
> Cc: Zhu, Rex; Mao, David; Fu, Ping; Zhang, Hawking; Huang, Ray
> Subject: [PART1 PATCH 0/8] Introduce a method to get clock gating status
> dynamically
>
> This series patches implement to get the clock gating status
> dynamically into debugfs. User will enter profiling mode to runtime
> disable clockgating, so it needs an interface to expose clock gating
> states. Part 1 works for VI, I will implement it on CI/SI in following
> days.

Patches 1-6:
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

Patches 7, 8:
I'm not sure if the UVD and VCE status registers are available if the blocks are powergated.  Reading them back while powergated can cause a hang.  Might want to check the PG sw state before reading back the registers.

Alex

>
> Here is the example on Fiji:
>
> root at jenkins-All-Series:/home/jenkins# cat
> /sys/kernel/debug/dri/64/amdgpu_pm_info
> Clock Gating Flags Mask: 0x3dfff
>         Medium Grain Clock Gating: On
>         Medium Grain memory Light Sleep: On
>         Coarse Grain Clock Gating: On
>         Coarse Grain memory Light Sleep: On
>         Coarse Grain Tree Shader: On
>         Coarse Grain Tree Shader Light Sleep: On
>         Command Processor Light Sleep: On
>         Run List Controller Light Sleep: On
>         Memory Controller Light Sleep: On
>         Memory Controller Medium Grain Clock Gating: On
>         System Direct Memory Access Light Sleep: On
>         System Direct Memory Access Medium Grain Clock Gating: On
>         Bus Interface Light Sleep: On
>         Universal Video Decoder Medium Grain Clock Gating: Off
>         Video Coding Engine Medium Grain Clock Gating: On
>         Host Data Path Light Sleep: On
>         Host Data Path Medium Grain Clock Gating: On
>         Rom Medium Grain Clock Gating: On
> ...
>
> Thanks,
> Rui
>
> Huang Rui (8):
>   drm/amdgpu: introduce an interface to get clock gating status
>     dynamically
>   drm/amdgpu: add parse clock gating state
>   drm/amdgpu: add clockgating_state method for gfx v8
>   drm/amdgpu: add clockgating_state method for gmc v8
>   drm/amdgpu: add clockgating_state method for sdma v3
>   drm/amdgpu: add clockgating_state method for vi common
>   drm/amdgpu: add clockgating_state method for uvd v5&v6
>   drm/amdgpu: add clockgating_state method for vce v3
>
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h        |  1 +
>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 ++++
>  drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c     | 99
> ++++++++++++++++++++++++++++++
>  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c      | 40 ++++++++++++
>  drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c      | 16 +++++
>  drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c     | 17 +++++
>  drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c      | 12 ++++
>  drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c      | 12 ++++
>  drivers/gpu/drm/amd/amdgpu/vce_v3_0.c      | 18 ++++++
>  drivers/gpu/drm/amd/amdgpu/vi.c            | 27 ++++++++
>  drivers/gpu/drm/amd/include/amd_shared.h   |  2 +
>  11 files changed, 256 insertions(+)
>
> --
> 2.7.4

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