答复: [V2 1/2] drm/amdgpu/vi: move virtualization detection forward

Liu, Monk Monk.Liu at amd.com
Mon Jan 9 05:54:20 UTC 2017


Reviewed-by: Monk Liu <monk.liu at amd.com>


________________________________
发件人: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> 代表 Xiangliang Yu <Xiangliang.Yu at amd.com>
发送时间: 2017年1月9日 13:05:53
收件人: amd-gfx at lists.freedesktop.org
抄送: Yu, Xiangliang
主题: [V2 1/2] drm/amdgpu/vi: move virtualization detection forward

Move the detection forward into vi_set_ip_blocks function, then
add ip blocks virtualization need if device is VF.

V2: add ip blocks according to asic type.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/vi.c | 24 +++++++++++++-----------
 1 file changed, 13 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index b2ce7da..7350a8f 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -857,7 +857,6 @@ static const struct amdgpu_asic_funcs vi_asic_funcs =
 {
         .read_disabled_bios = &vi_read_disabled_bios,
         .read_bios_from_rom = &vi_read_bios_from_rom,
-       .detect_hw_virtualization = vi_detect_hw_virtualization,
         .read_register = &vi_read_register,
         .reset = &vi_asic_reset,
         .set_vga_state = &vi_vga_set_state,
@@ -1049,10 +1048,6 @@ static int vi_common_early_init(void *handle)
                 return -EINVAL;
         }

-       /* in early init stage, vbios code won't work */
-       if (adev->asic_funcs->detect_hw_virtualization)
-               amdgpu_asic_detect_hw_virtualization(adev);
-
         if (amdgpu_smc_load_fw && smc_enabled)
                 adev->firmware.smu_load = true;

@@ -1403,6 +1398,9 @@ static const struct amdgpu_ip_block_version vi_common_ip_block =

 int vi_set_ip_blocks(struct amdgpu_device *adev)
 {
+       /* in early init stage, vbios code won't work */
+       vi_detect_hw_virtualization(adev);
+
         switch (adev->asic_type) {
         case CHIP_TOPAZ:
                 /* topaz has no DCE, UVD, VCE */
@@ -1420,7 +1418,7 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
                 amdgpu_ip_block_add(adev, &gmc_v8_5_ip_block);
                 amdgpu_ip_block_add(adev, &tonga_ih_ip_block);
                 amdgpu_ip_block_add(adev, &amdgpu_pp_ip_block);
-               if (adev->enable_virtual_display)
+               if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
                         amdgpu_ip_block_add(adev, &dce_virtual_ip_block);
 #if defined(CONFIG_DRM_AMD_DC)
                 else if (amdgpu_device_has_dc_support(adev))
@@ -1430,15 +1428,17 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
                         amdgpu_ip_block_add(adev, &dce_v10_1_ip_block);
                 amdgpu_ip_block_add(adev, &gfx_v8_0_ip_block);
                 amdgpu_ip_block_add(adev, &sdma_v3_0_ip_block);
-               amdgpu_ip_block_add(adev, &uvd_v6_0_ip_block);
-               amdgpu_ip_block_add(adev, &vce_v3_0_ip_block);
+               if (!amdgpu_sriov_vf(adev)) {
+                       amdgpu_ip_block_add(adev, &uvd_v6_0_ip_block);
+                       amdgpu_ip_block_add(adev, &vce_v3_0_ip_block);
+               }
                 break;
         case CHIP_TONGA:
                 amdgpu_ip_block_add(adev, &vi_common_ip_block);
                 amdgpu_ip_block_add(adev, &gmc_v8_0_ip_block);
                 amdgpu_ip_block_add(adev, &tonga_ih_ip_block);
                 amdgpu_ip_block_add(adev, &amdgpu_pp_ip_block);
-               if (adev->enable_virtual_display)
+               if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
                         amdgpu_ip_block_add(adev, &dce_virtual_ip_block);
 #if defined(CONFIG_DRM_AMD_DC)
                 else if (amdgpu_device_has_dc_support(adev))
@@ -1448,8 +1448,10 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
                         amdgpu_ip_block_add(adev, &dce_v10_0_ip_block);
                 amdgpu_ip_block_add(adev, &gfx_v8_0_ip_block);
                 amdgpu_ip_block_add(adev, &sdma_v3_0_ip_block);
-               amdgpu_ip_block_add(adev, &uvd_v5_0_ip_block);
-               amdgpu_ip_block_add(adev, &vce_v3_0_ip_block);
+               if (!amdgpu_sriov_vf(adev)) {
+                       amdgpu_ip_block_add(adev, &uvd_v5_0_ip_block);
+                       amdgpu_ip_block_add(adev, &vce_v3_0_ip_block);
+               }
                 break;
         case CHIP_POLARIS11:
         case CHIP_POLARIS10:
--
2.7.4

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