[PATCH 1/2] drm/amdgpu: Populate DPMv1 voltage tables
Donny Yang
work at kota.moe
Fri Jan 13 08:58:00 UTC 2017
Signed-off-by: Donny Yang <work at kota.moe>
---
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 46 +++++++++++++++++-------
1 file changed, 33 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index f6c01e19..103e1330 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -705,7 +705,7 @@ static int smu7_setup_dpm_tables_v0(struct pp_hwmgr *hwmgr)
/* Initialize Vddc DPM table based on allow Vddc values. And populate corresponding std values. */
for (i = 0; i < allowed_vdd_sclk_table->count; i++) {
- data->dpm_table.vddc_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].v;
+ data->dpm_table.vddc_table.dpm_levels[i].value = allowed_vdd_sclk_table->entries[i].v;
data->dpm_table.vddc_table.dpm_levels[i].param1 = std_voltage_table->entries[i].Leakage;
/* param1 is for corresponding std voltage */
data->dpm_table.vddc_table.dpm_levels[i].enabled = 1;
@@ -749,12 +749,19 @@ static int smu7_setup_dpm_tables_v1(struct pp_hwmgr *hwmgr)
struct phm_ppt_v1_clock_voltage_dependency_table *dep_sclk_table;
struct phm_ppt_v1_clock_voltage_dependency_table *dep_mclk_table;
+ struct smu7_single_dpm_table *sclk_table, *mclk_table,
+ *vddc_table, *mvdd_table, *vddci_table;
if (table_info == NULL)
return -EINVAL;
dep_sclk_table = table_info->vdd_dep_on_sclk;
dep_mclk_table = table_info->vdd_dep_on_mclk;
+ sclk_table = &data->dpm_table.sclk_table;
+ mclk_table = &data->dpm_table.mclk_table;
+ vddc_table = &data->dpm_table.vddc_table;
+ mvdd_table = &data->dpm_table.mvdd_table;
+ vddci_table = &data->dpm_table.vddci_table;
PP_ASSERT_WITH_CODE(dep_sclk_table != NULL,
"SCLK dependency table is missing.",
@@ -770,32 +777,45 @@ static int smu7_setup_dpm_tables_v1(struct pp_hwmgr *hwmgr)
"MCLK dependency table count is 0",
return -EINVAL);
- /* Initialize Sclk DPM table based on allow Sclk values */
+ /* Initialize Sclk and VDDC DPM table based on allow Sclk values */
data->dpm_table.sclk_table.count = 0;
+ data->dpm_table.vddc_table.count = 0;
for (i = 0; i < dep_sclk_table->count; i++) {
if (i == 0 || data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count - 1].value !=
dep_sclk_table->entries[i].clk) {
+ phm_ppt_v1_clock_voltage_dependency_record *entry = &dep_sclk_table->entries[i];
- data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].value =
- dep_sclk_table->entries[i].clk;
+ sclk_table->dpm_levels[sclk_table->count].value = entry->clk;
+ sclk_table->dpm_levels[sclk_table->count].enabled = i == 0;
+ sclk_table->count++;
- data->dpm_table.sclk_table.dpm_levels[data->dpm_table.sclk_table.count].enabled =
- (i == 0) ? true : false;
- data->dpm_table.sclk_table.count++;
+ vddc_table->dpm_levels[vddc_table->count].value = entry->vddc;
+ vddc_table->dpm_levels[vddc_table->count].enabled = i == 0;
+ vddc_table->count++;
}
}
- /* Initialize Mclk DPM table based on allow Mclk values */
+ /* Initialize Mclk, VDDCI and MVDD DPM table based on allow Mclk values */
data->dpm_table.mclk_table.count = 0;
+ data->dpm_table.mvdd_table.count = 0;
+ data->dpm_table.vddci_table.count = 0;
for (i = 0; i < dep_mclk_table->count; i++) {
if (i == 0 || data->dpm_table.mclk_table.dpm_levels
[data->dpm_table.mclk_table.count - 1].value !=
dep_mclk_table->entries[i].clk) {
- data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].value =
- dep_mclk_table->entries[i].clk;
- data->dpm_table.mclk_table.dpm_levels[data->dpm_table.mclk_table.count].enabled =
- (i == 0) ? true : false;
- data->dpm_table.mclk_table.count++;
+ phm_ppt_v1_clock_voltage_dependency_record *entry = &dep_mclk_table->entries[i];
+
+ mclk_table->dpm_levels[mclk_table->count].value = entry->clk;
+ mclk_table->dpm_levels[mclk_table->count].enabled = i == 0;
+ mclk_table->count++;
+
+ mvdd_table->dpm_levels[mvdd_table->count].value = entry->vddc;
+ mvdd_table->dpm_levels[mvdd_table->count].enabled = i == 0;
+ mvdd_table->count++;
+
+ vddci_table->dpm_levels[vddci_table->count].value = entry->vddci;
+ vddci_table->dpm_levels[vddci_table->count].enabled = i == 0;
+ vddci_table->count++;
}
}
--
2.11.0
More information about the amd-gfx
mailing list