[PATCH 11/11] drm/amd/display: Fixed 4K black issue by refactor update surface.
Harry Wentland
harry.wentland at amd.com
Tue Jan 24 14:25:27 UTC 2017
From: Yongqiang Sun <yongqiang.sun at amd.com>
Change-Id: Ibff4c15aeddf0a013a9c2edca9b82219818cfccb
Signed-off-by: Yongqiang Sun <yongqiang.sun at amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng at amd.com>
Acked-by: Harry Wentland <Harry.Wentland at amd.com>
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 28 ++++++++++++++++------------
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 170936bb378a..01d614781def 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1482,17 +1482,19 @@ void dc_update_surfaces_for_stream(struct dc *dc,
}
/* not sure if we still need this */
- for (j = 0; j < context->res_ctx.pool->pipe_count; j++) {
- struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j];
- struct core_stream *stream = pipe_ctx->stream;
+ if (update_type == UPDATE_TYPE_FULL) {
+ for (j = 0; j < context->res_ctx.pool->pipe_count; j++) {
+ struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j];
+ struct core_stream *stream = pipe_ctx->stream;
- if (pipe_ctx->surface != surface)
- continue;
+ if (pipe_ctx->surface != surface)
+ continue;
- resource_build_scaling_params(updates[i].surface, pipe_ctx);
- if (dc->debug.surface_visual_confirm) {
- pipe_ctx->scl_data.recout.height -= 2;
- pipe_ctx->scl_data.recout.width -= 2;
+ resource_build_scaling_params(updates[i].surface, pipe_ctx);
+ if (dc->debug.surface_visual_confirm) {
+ pipe_ctx->scl_data.recout.height -= 2;
+ pipe_ctx->scl_data.recout.width -= 2;
+ }
}
}
@@ -1563,10 +1565,12 @@ void dc_update_surfaces_for_stream(struct dc *dc,
}
if (update_type == UPDATE_TYPE_FULL) {
- core_dc->hwss.apply_ctx_for_surface(core_dc, surface, context);
- } else if (updates[i].flip_addr) {
+ /* only apply for top pipe */
+ if (!pipe_ctx->top_pipe)
+ core_dc->hwss.apply_ctx_for_surface(core_dc,
+ surface, context);
+ } else if (updates[i].flip_addr)
core_dc->hwss.update_plane_addr(core_dc, pipe_ctx);
- }
if (update_type == UPDATE_TYPE_FAST)
continue;
--
2.9.3
More information about the amd-gfx
mailing list