[PATCH 02/11] drm/amdgpu: add amdgpu_gart_map function v2

Alex Deucher alexdeucher at gmail.com
Thu Jul 6 16:16:07 UTC 2017


On Mon, Jul 3, 2017 at 5:44 AM, Christian König <deathsimple at vodafone.de> wrote:
> From: Christian König <christian.koenig at amd.com>
>
> This allows us to write the mapped PTEs into
> an IB instead of the table directly.
>
> v2: fix build with debugfs enabled, remove unused assignment
>
> Signed-off-by: Christian König <christian.koenig at amd.com>

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h      |  3 ++
>  drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 62 ++++++++++++++++++++++++--------
>  2 files changed, 51 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 810796a..4a2b33d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -572,6 +572,9 @@ int amdgpu_gart_init(struct amdgpu_device *adev);
>  void amdgpu_gart_fini(struct amdgpu_device *adev);
>  int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
>                         int pages);
> +int amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,
> +                   int pages, dma_addr_t *dma_addr, uint64_t flags,
> +                   void *dst);
>  int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset,
>                      int pages, struct page **pagelist,
>                      dma_addr_t *dma_addr, uint64_t flags);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
> index 8877015..c808388 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
> @@ -280,6 +280,41 @@ int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset,
>  }
>
>  /**
> + * amdgpu_gart_map - map dma_addresses into GART entries
> + *
> + * @adev: amdgpu_device pointer
> + * @offset: offset into the GPU's gart aperture
> + * @pages: number of pages to bind
> + * @dma_addr: DMA addresses of pages
> + *
> + * Map the dma_addresses into GART entries (all asics).
> + * Returns 0 for success, -EINVAL for failure.
> + */
> +int amdgpu_gart_map(struct amdgpu_device *adev, uint64_t offset,
> +                   int pages, dma_addr_t *dma_addr, uint64_t flags,
> +                   void *dst)
> +{
> +       uint64_t page_base;
> +       unsigned i, j, t;
> +
> +       if (!adev->gart.ready) {
> +               WARN(1, "trying to bind memory to uninitialized GART !\n");
> +               return -EINVAL;
> +       }
> +
> +       t = offset / AMDGPU_GPU_PAGE_SIZE;
> +
> +       for (i = 0; i < pages; i++) {
> +               page_base = dma_addr[i];
> +               for (j = 0; j < (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE); j++, t++) {
> +                       amdgpu_gart_set_pte_pde(adev, dst, t, page_base, flags);
> +                       page_base += AMDGPU_GPU_PAGE_SIZE;
> +               }
> +       }
> +       return 0;
> +}
> +
> +/**
>   * amdgpu_gart_bind - bind pages into the gart page table
>   *
>   * @adev: amdgpu_device pointer
> @@ -296,31 +331,30 @@ int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset,
>                      int pages, struct page **pagelist, dma_addr_t *dma_addr,
>                      uint64_t flags)
>  {
> -       unsigned t;
> -       unsigned p;
> -       uint64_t page_base;
> -       int i, j;
> +#ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS
> +       unsigned i,t,p;
> +#endif
> +       int r;
>
>         if (!adev->gart.ready) {
>                 WARN(1, "trying to bind memory to uninitialized GART !\n");
>                 return -EINVAL;
>         }
>
> +#ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS
>         t = offset / AMDGPU_GPU_PAGE_SIZE;
>         p = t / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
> -
> -       for (i = 0; i < pages; i++, p++) {
> -#ifdef CONFIG_DRM_AMDGPU_GART_DEBUGFS
> +       for (i = 0; i < pages; i++, p++)
>                 adev->gart.pages[p] = pagelist[i];
>  #endif
> -               if (adev->gart.ptr) {
> -                       page_base = dma_addr[i];
> -                       for (j = 0; j < (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE); j++, t++) {
> -                               amdgpu_gart_set_pte_pde(adev, adev->gart.ptr, t, page_base, flags);
> -                               page_base += AMDGPU_GPU_PAGE_SIZE;
> -                       }
> -               }
> +
> +       if (adev->gart.ptr) {
> +               r = amdgpu_gart_map(adev, offset, pages, dma_addr, flags,
> +                           adev->gart.ptr);
> +               if (r)
> +                       return r;
>         }
> +
>         mb();
>         amdgpu_gart_flush_gpu_tlb(adev, 0);
>         return 0;
> --
> 2.7.4
>
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