Fw: [PATCH] drm/amdgpu:fix gfx fence allocate size

[Liu, Monk]

________________________________
From: Monk Liu <Monk.Liu at amd.com>
Sent: Tuesday, July 18, 2017 1:56 PM
To: amd-gfx-bounces at lists.freedesktop.org
Cc: Liu, Monk; Yu, Xiangliang
Subject: [PATCH] drm/amdgpu:fix gfx fence allocate size

1, for sriov, we need 8dw for the gfx fence due to CP
behaviour
2, cleanup wrong logic in wptr/rptr wb alloc and free

Change-Id: Ifbfed17a4621dae57244942ffac7de1743de0294
Signed-off-by: Monk Liu <Monk.Liu at amd.com>
Signed-off-by: Xiangliang Yu <Xiangliang.Yu at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h        |  2 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 32 ++++++++++++++++++++++++++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c   | 26 ++++++++++++++++--------
 3 files changed, 52 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index f6345b9..fe96236 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1191,7 +1191,9 @@ struct amdgpu_wb {
 int amdgpu_wb_get(struct amdgpu_device *adev, u32 *wb);
 void amdgpu_wb_free(struct amdgpu_device *adev, u32 wb);
 int amdgpu_wb_get_64bit(struct amdgpu_device *adev, u32 *wb);
+int amdgpu_wb_get_256Bit(struct amdgpu_device *adev, u32 *wb);
 void amdgpu_wb_free_64bit(struct amdgpu_device *adev, u32 wb);
+void amdgpu_wb_free_256bit(struct amdgpu_device *adev, u32 wb);

 void amdgpu_get_pcie_info(struct amdgpu_device *adev);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 7e11190..6050804 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -603,6 +603,21 @@ int amdgpu_wb_get_64bit(struct amdgpu_device *adev, u32 *wb)
         }
 }

+int amdgpu_wb_get_256Bit(struct amdgpu_device *adev, u32 *wb)
+{
+       int i = 0;
+       unsigned long offset = bitmap_find_next_zero_area_off(adev->wb.used,
+                               adev->wb.num_wb, 0, 8, 63, 0);
+       if ((offset + 7) < adev->wb.num_wb) {
+               for (i = 0; i < 8; i++)
+                       __set_bit(offset + i, adev->wb.used);
+               *wb = offset;
+               return 0;
+       } else {
+               return -EINVAL;
+       }
+}
+
 /**
  * amdgpu_wb_free - Free a wb entry
  *
@@ -634,6 +649,23 @@ void amdgpu_wb_free_64bit(struct amdgpu_device *adev, u32 wb)
 }

 /**
+ * amdgpu_wb_free_256bit - Free a wb entry
+ *
+ * @adev: amdgpu_device pointer
+ * @wb: wb index
+ *
+ * Free a wb slot allocated for use by the driver (all asics)
+ */
+void amdgpu_wb_free_256bit(struct amdgpu_device *adev, u32 wb)
+{
+       int i = 0;
+
+       if ((wb + 7) < adev->wb.num_wb)
+               for (i = 0; i < 8; i++)
+                       __clear_bit(wb + i, adev->wb.used);
+}
+
+/**
  * amdgpu_vram_location - try to find VRAM location
  * @adev: amdgpu device structure holding all necessary informations
  * @mc: memory controller structure holding memory informations
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
index 75165e0..eea17ae 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
@@ -212,10 +212,19 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,

         }

-       r = amdgpu_wb_get(adev, &ring->fence_offs);
-       if (r) {
-               dev_err(adev->dev, "(%d) ring fence_offs wb alloc failed\n", r);
-               return r;
+       if (amdgpu_sriov_vf(adev) && ring->funcs->type == AMDGPU_RING_TYPE_GFX) {
+               r = amdgpu_wb_get_256Bit(adev, &ring->fence_offs);
+               if (r) {
+                       dev_err(adev->dev, "(%d) ring fence_offs wb alloc failed\n", r);
+                       return r;
+               }
+
+       } else {
+               r = amdgpu_wb_get(adev, &ring->fence_offs);
+               if (r) {
+                       dev_err(adev->dev, "(%d) ring fence_offs wb alloc failed\n", r);
+                       return r;
+               }
         }

         r = amdgpu_wb_get(adev, &ring->cond_exe_offs);
@@ -278,17 +287,18 @@ void amdgpu_ring_fini(struct amdgpu_ring *ring)
         ring->ready = false;

         if (ring->funcs->support_64bit_ptrs) {
-               amdgpu_wb_free_64bit(ring->adev, ring->cond_exe_offs);
-               amdgpu_wb_free_64bit(ring->adev, ring->fence_offs);
                 amdgpu_wb_free_64bit(ring->adev, ring->rptr_offs);
                 amdgpu_wb_free_64bit(ring->adev, ring->wptr_offs);
         } else {
-               amdgpu_wb_free(ring->adev, ring->cond_exe_offs);
-               amdgpu_wb_free(ring->adev, ring->fence_offs);
                 amdgpu_wb_free(ring->adev, ring->rptr_offs);
                 amdgpu_wb_free(ring->adev, ring->wptr_offs);
         }

+       amdgpu_wb_free(ring->adev, ring->cond_exe_offs);
+       if (amdgpu_sriov_vf(ring->adev) && ring->funcs->type == AMDGPU_RING_TYPE_GFX)
+               amdgpu_wb_free_256bit(ring->adev, ring->fence_offs);
+       else
+               amdgpu_wb_free(ring->adev, ring->cond_exe_offs);

         amdgpu_bo_free_kernel(&ring->ring_obj,
                               &ring->gpu_addr,
--
2.7.4

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