[PATCH 55/81] drm/amd/display: change non_dpm0 state's default SR latency

[sunpeng.li at amd.com]

From: Charlene Liu <charlene.liu at amd.com>

Change-Id: I007042fc257012639bab29c5df6c7c347239dd3d
Signed-off-by: Charlene Liu <charlene.liu at amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin at amd.com>
Acked-by: Harry Wentland <Harry.Wentland at amd.com>
---
 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
index a1eabc4..0ea0dab 100644
--- a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
+++ b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
@@ -37,8 +37,8 @@
 /* Defaults from spreadsheet rev#247 */
 const struct dcn_soc_bounding_box dcn10_soc_defaults = {
 		/* latencies */
-		.sr_exit_time = 17, /*us*/
-		.sr_enter_plus_exit_time = 19, /*us*/
+		.sr_exit_time = 13, /*us*/
+		.sr_enter_plus_exit_time = 15, /*us*/
 		.urgent_latency = 4, /*us*/
 		.dram_clock_change_latency = 17, /*us*/
 		.write_back_latency = 12, /*us*/
-- 
2.7.4