[PATCH 3/8] drm/amdgpu/vce4: Remove vce interrupt enable related code for sriov

[Alex Deucher]

On Tue, Jul 25, 2017 at 5:17 AM, Xiangliang.Yu <Xiangliang.Yu at amd.com> wrote:
> From: Frank Min <Frank.Min at amd.com>
>
> Interrupt enable is contained in vce init table and this register could
> not be accessed in secure ASICs, so just remove it.
>
> Signed-off-by: Frank Min <Frank.Min at amd.com>
> Signed-off-by: Xiangliang.Yu <Xiangliang.Yu at amd.com>

Acked-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
> index 28532e3..9e0050d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c
> @@ -992,11 +992,13 @@ static int vce_v4_0_set_interrupt_state(struct amdgpu_device *adev,
>  {
>         uint32_t val = 0;
>
> -       if (state == AMDGPU_IRQ_STATE_ENABLE)
> -               val |= VCE_SYS_INT_EN__VCE_SYS_INT_TRAP_INTERRUPT_EN_MASK;
> +       if (!amdgpu_sriov_vf(adev)) {
> +               if (state == AMDGPU_IRQ_STATE_ENABLE)
> +                       val |= VCE_SYS_INT_EN__VCE_SYS_INT_TRAP_INTERRUPT_EN_MASK;
>
> -       WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_SYS_INT_EN), val,
> -                       ~VCE_SYS_INT_EN__VCE_SYS_INT_TRAP_INTERRUPT_EN_MASK);
> +               WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_SYS_INT_EN), val,
> +                               ~VCE_SYS_INT_EN__VCE_SYS_INT_TRAP_INTERRUPT_EN_MASK);
> +       }
>         return 0;
>  }
>
> --
> 2.7.4
>
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