[PATCH 3/4] drm/amdgpu: increase fragmentation size for Vega10

[zhoucm1]

On 2017年05月31日 20:38, Christian König wrote:
> From: Christian König <christian.koenig at amd.com>
>
> The fragment bits work differently for Vega10 compared to previous generations.
>
> Increase the fragment size to 2MB for now to better handle that.
I checked the fragment bits in PTE, don't find difference, Could you 
point what difference is?
And 2MB fragment seems not a good option, the buffer people allocated 
may be often smaller than 2MB, so 64KB seems be more effective.

Regards,
David Zhou
>
> Signed-off-by: Christian König <christian.koenig at amd.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 5 +++--
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c  | 5 +++--
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h  | 4 +++-
>   3 files changed, 9 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> index 4dd83a3..36de8a5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> @@ -551,8 +551,9 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
>   		dev_info.virtual_address_offset = AMDGPU_VA_RESERVED_SIZE;
>   		dev_info.virtual_address_max = (uint64_t)adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE;
>   		dev_info.virtual_address_alignment = max((int)PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE);
> -		dev_info.pte_fragment_size = (1 << AMDGPU_LOG2_PAGES_PER_FRAG) *
> -					     AMDGPU_GPU_PAGE_SIZE;
> +		dev_info.pte_fragment_size =
> +			(1 << AMDGPU_LOG2_PAGES_PER_FRAG(adev)) *
> +			AMDGPU_GPU_PAGE_SIZE;
>   		dev_info.gart_page_size = AMDGPU_GPU_PAGE_SIZE;
>   
>   		dev_info.cu_active_number = adev->gfx.cu_info.number;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index b56e24a..d07a28c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -1239,8 +1239,9 @@ static int amdgpu_vm_frag_ptes(struct amdgpu_pte_update_params	*params,
>   	 */
>   
>   	/* SI and newer are optimized for 64KB */
> -	uint64_t frag_flags = AMDGPU_PTE_FRAG(AMDGPU_LOG2_PAGES_PER_FRAG);
> -	uint64_t frag_align = 1 << AMDGPU_LOG2_PAGES_PER_FRAG;
> +	unsigned pages_per_frag = AMDGPU_LOG2_PAGES_PER_FRAG(params->adev);
> +	uint64_t frag_flags = AMDGPU_PTE_FRAG(pages_per_frag);
> +	uint64_t frag_align = 1 << pages_per_frag;
>   
>   	uint64_t frag_start = ALIGN(start, frag_align);
>   	uint64_t frag_end = end & ~(frag_align - 1);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> index a49c608..aabe815 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> @@ -51,7 +51,9 @@ struct amdgpu_bo_list_entry;
>   #define AMDGPU_VM_PTB_ALIGN_SIZE   32768
>   
>   /* LOG2 number of continuous pages for the fragment field */
> -#define AMDGPU_LOG2_PAGES_PER_FRAG 4
> +#define AMDGPU_LOG2_PAGES_PER_FRAG(adev) \
> +	((adev)->asic_type < CHIP_VEGA10 ? 4 : \
> +	 (adev)->vm_manager.block_size)
>   
>   #define AMDGPU_PTE_VALID	(1ULL << 0)
>   #define AMDGPU_PTE_SYSTEM	(1ULL << 1)