[PATCH] drm/amdgpu: enable gfx 9.0 cp interrupts
Huang Rui
ray.huang at amd.com
Thu Jun 1 05:38:56 UTC 2017
On Thu, Jun 01, 2017 at 12:26:40PM +0800, Ken Wang wrote:
> Change-Id: If7dee7bd1074eac7faa6af724a7272f9ce6f3a98
> Signed-off-by: Ken Wang <Qingqing.Wang at amd.com>
Reviewed-by: Huang Rui <ray.huang at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index de35de2..68a0d40 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -1393,9 +1393,6 @@ static void gfx_v9_0_enable_gui_idle_interrupt(struct amdgpu_device *adev,
> {
> u32 tmp = RREG32_SOC15(GC, 0, mmCP_INT_CNTL_RING0);
>
> - if (enable)
> - return;
> -
> tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_BUSY_INT_ENABLE, enable ? 1 : 0);
> tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CNTX_EMPTY_INT_ENABLE, enable ? 1 : 0);
> tmp = REG_SET_FIELD(tmp, CP_INT_CNTL_RING0, CMP_BUSY_INT_ENABLE, enable ? 1 : 0);
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
More information about the amd-gfx
mailing list