[PATCH 1/3] drm/amdgpu: Moved gfx_v8_0_select_se_sh() in lieu of re-redundant prototype.

[Deucher, Alexander]

> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf
> Of David Panariti
> Sent: Tuesday, June 06, 2017 4:33 PM
> To: amd-gfx at lists.freedesktop.org
> Cc: Panariti, David
> Subject: [PATCH 1/3] drm/amdgpu: Moved gfx_v8_0_select_se_sh() in lieu
> of re-redundant prototype.
> 
> Will be needed for the rest of the EDC workarounds patch.
> 
> Signed-off-by: David Panariti <David.Panariti at amd.com>

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 46 +++++++++++++++++-------
> -----------
>  1 file changed, 23 insertions(+), 23 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index 69d9bbd..07172f8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -662,6 +662,29 @@ static void gfx_v8_0_ring_emit_de_meta(struct
> amdgpu_ring *ring);
>  static int gfx_v8_0_compute_mqd_sw_init(struct amdgpu_device *adev);
>  static void gfx_v8_0_compute_mqd_sw_fini(struct amdgpu_device *adev);
> 
> +static void gfx_v8_0_select_se_sh(struct amdgpu_device *adev,
> +				  u32 se_num, u32 sh_num, u32 instance)
> +{
> +	u32 data;
> +
> +	if (instance == 0xffffffff)
> +		data = REG_SET_FIELD(0, GRBM_GFX_INDEX,
> INSTANCE_BROADCAST_WRITES, 1);
> +	else
> +		data = REG_SET_FIELD(0, GRBM_GFX_INDEX,
> INSTANCE_INDEX, instance);
> +
> +	if (se_num == 0xffffffff)
> +		data = REG_SET_FIELD(data, GRBM_GFX_INDEX,
> SE_BROADCAST_WRITES, 1);
> +	else
> +		data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX,
> se_num);
> +
> +	if (sh_num == 0xffffffff)
> +		data = REG_SET_FIELD(data, GRBM_GFX_INDEX,
> SH_BROADCAST_WRITES, 1);
> +	else
> +		data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_INDEX,
> sh_num);
> +
> +	WREG32(mmGRBM_GFX_INDEX, data);
> +}
> +
>  static void gfx_v8_0_init_golden_registers(struct amdgpu_device *adev)
>  {
>  	switch (adev->asic_type) {
> @@ -3679,29 +3702,6 @@ static void gfx_v8_0_tiling_mode_table_init(struct
> amdgpu_device *adev)
>  	}
>  }
> 
> -static void gfx_v8_0_select_se_sh(struct amdgpu_device *adev,
> -				  u32 se_num, u32 sh_num, u32 instance)
> -{
> -	u32 data;
> -
> -	if (instance == 0xffffffff)
> -		data = REG_SET_FIELD(0, GRBM_GFX_INDEX,
> INSTANCE_BROADCAST_WRITES, 1);
> -	else
> -		data = REG_SET_FIELD(0, GRBM_GFX_INDEX,
> INSTANCE_INDEX, instance);
> -
> -	if (se_num == 0xffffffff)
> -		data = REG_SET_FIELD(data, GRBM_GFX_INDEX,
> SE_BROADCAST_WRITES, 1);
> -	else
> -		data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX,
> se_num);
> -
> -	if (sh_num == 0xffffffff)
> -		data = REG_SET_FIELD(data, GRBM_GFX_INDEX,
> SH_BROADCAST_WRITES, 1);
> -	else
> -		data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SH_INDEX,
> sh_num);
> -
> -	WREG32(mmGRBM_GFX_INDEX, data);
> -}
> -
>  static u32 gfx_v8_0_create_bitmask(u32 bit_width)
>  {
>  	return (u32)((1ULL << bit_width) - 1);
> --
> 2.7.4
> 
> _______________________________________________
> amd-gfx mailing list
> amd-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx