[PATCH v2] drm/amdgpu: export gpu always on cu bitmap

Christian König deathsimple at vodafone.de
Thu Jun 22 07:37:56 UTC 2017


Am 22.06.2017 um 05:13 schrieb Flora Cui:
> v2: keep cu_ao_mask for backward compatibility.
>
> Change-Id: I056d8af23340d46e5140bd10cc38dfb887cc78ab
> Signed-off-by: Flora Cui <Flora.Cui at amd.com>

I can't judge the technical correctness, but at least it looks backward 
compatible now.

Patch is Acked-by: Christian König <christian.koenig at amd.com>.

Regards,
Christian.

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu.h     | 7 +++++--
>   drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
>   drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 +++-
>   drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c   | 4 +++-
>   drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c   | 4 +++-
>   drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c   | 4 +++-
>   drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c   | 4 +++-
>   include/uapi/drm/amdgpu_drm.h           | 3 +++
>   8 files changed, 25 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 6b7d2a1..6b9a91c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1029,12 +1029,15 @@ struct amdgpu_gfx_config {
>   };
>   
>   struct amdgpu_cu_info {
> -	uint32_t number; /* total active CU number */
> -	uint32_t ao_cu_mask;
>   	uint32_t max_waves_per_simd;
>   	uint32_t wave_front_size;
>   	uint32_t max_scratch_slots_per_cu;
>   	uint32_t lds_size;
> +
> +	/* total active CU number */
> +	uint32_t number;
> +	uint32_t ao_cu_mask;
> +	uint32_t ao_cu_bitmap[4][4];
>   	uint32_t bitmap[4][4];
>   };
>   
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> index 0424711..5a1d794 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> @@ -67,9 +67,10 @@
>    * - 3.15.0 - Export more gpu info for gfx9
>    * - 3.16.0 - Add reserved vmid support
>    * - 3.17.0 - Add AMDGPU_NUM_VRAM_CPU_PAGE_FAULTS.
> + * - 3.18.0 - Export gpu always on cu bitmap
>    */
>   #define KMS_DRIVER_MAJOR	3
> -#define KMS_DRIVER_MINOR	17
> +#define KMS_DRIVER_MINOR	18
>   #define KMS_DRIVER_PATCHLEVEL	0
>   
>   int amdgpu_vram_limit = 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> index f68ced6..eff2e11 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> @@ -591,8 +591,10 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
>   		dev_info.gart_page_size = AMDGPU_GPU_PAGE_SIZE;
>   
>   		dev_info.cu_active_number = adev->gfx.cu_info.number;
> -		dev_info.cu_ao_mask = adev->gfx.cu_info.ao_cu_mask;
> +		dev_info.cu_ao_mask = 0;
>   		dev_info.ce_ram_size = adev->gfx.ce_ram_size;
> +		memcpy(&dev_info.cu_ao_bitmap[0], &adev->gfx.cu_info.ao_cu_bitmap[0],
> +		       sizeof(adev->gfx.cu_info.ao_cu_bitmap));
>   		memcpy(&dev_info.cu_bitmap[0], &adev->gfx.cu_info.bitmap[0],
>   		       sizeof(adev->gfx.cu_info.bitmap));
>   		dev_info.vram_type = adev->mc.vram_type;
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> index 7b0b3cf..5173ca1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
> @@ -3535,7 +3535,9 @@ static void gfx_v6_0_get_cu_info(struct amdgpu_device *adev)
>   				mask <<= 1;
>   			}
>   			active_cu_number += counter;
> -			ao_cu_mask |= (ao_bitmap << (i * 16 + j * 8));
> +			if (i < 2 && j < 2)
> +				ao_cu_mask |= (ao_bitmap << (i * 16 + j * 8));
> +			cu_info->ao_cu_bitmap[i][j] = ao_bitmap;
>   		}
>   	}
>   
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> index fb0a94c..8c4dd7b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
> @@ -5427,7 +5427,9 @@ static void gfx_v7_0_get_cu_info(struct amdgpu_device *adev)
>   				mask <<= 1;
>   			}
>   			active_cu_number += counter;
> -			ao_cu_mask |= (ao_bitmap << (i * 16 + j * 8));
> +			if (i < 2 && j < 2)
> +				ao_cu_mask |= (ao_bitmap << (i * 16 + j * 8));
> +			cu_info->ao_cu_bitmap[i][j] = ao_bitmap;
>   		}
>   	}
>   	gfx_v7_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff);
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index 1a75ab1..9edb509 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -7080,7 +7080,9 @@ static void gfx_v8_0_get_cu_info(struct amdgpu_device *adev)
>   				mask <<= 1;
>   			}
>   			active_cu_number += counter;
> -			ao_cu_mask |= (ao_bitmap << (i * 16 + j * 8));
> +			if (i < 2 && j < 2)
> +				ao_cu_mask |= (ao_bitmap << (i * 16 + j * 8));
> +			cu_info->ao_cu_bitmap[i][j] = ao_bitmap;
>   		}
>   	}
>   	gfx_v8_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff);
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 5d56126..0d6a6d9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -4459,7 +4459,9 @@ static int gfx_v9_0_get_cu_info(struct amdgpu_device *adev,
>   				mask <<= 1;
>   			}
>   			active_cu_number += counter;
> -			ao_cu_mask |= (ao_bitmap << (i * 16 + j * 8));
> +			if (i < 2 && j < 2)
> +				ao_cu_mask |= (ao_bitmap << (i * 16 + j * 8));
> +			cu_info->ao_cu_bitmap[i][j] = ao_bitmap;
>   		}
>   	}
>   	gfx_v9_0_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff);
> diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
> index 4f34394..d0ee739 100644
> --- a/include/uapi/drm/amdgpu_drm.h
> +++ b/include/uapi/drm/amdgpu_drm.h
> @@ -760,6 +760,7 @@ struct drm_amdgpu_info_device {
>   	__u64 max_memory_clock;
>   	/* cu information */
>   	__u32 cu_active_number;
> +	/* NOTE: cu_ao_mask is INVALID, DON'T use it */
>   	__u32 cu_ao_mask;
>   	__u32 cu_bitmap[4][4];
>   	/** Render backend pipe mask. One render backend is CB+DB. */
> @@ -814,6 +815,8 @@ struct drm_amdgpu_info_device {
>   	/* max gs wavefront per vgt*/
>   	__u32 max_gs_waves_per_vgt;
>   	__u32 _pad1;
> +	/* always on cu bitmap */
> +	__u32 cu_ao_bitmap[4][4];
>   };
>   
>   struct drm_amdgpu_info_hw_ip {




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