[PATCH] drm/amdgpu: Make KIQ read/write register routine be atomic

[Liu, Shaoyun]

Hi , Christian
The new code actually will not use the fence function , it just need a memory that expose both CPU and  GPU address .  Do you  really want to add the wrap functions that just expose the CPU and  GPU address in this case  ?

Regards
Shaoyun.liu

 
-----Original Message-----
From: Christian König [mailto:deathsimple at vodafone.de] 
Sent: Friday, June 30, 2017 3:57 AM
To: Michel Dänzer; Liu, Shaoyun
Cc: amd-gfx at lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu: Make KIQ read/write register routine be atomic

Am 30.06.2017 um 03:21 schrieb Michel Dänzer:
> On 30/06/17 06:08 AM, Shaoyun Liu wrote:
>> 1. Use spin lock instead of mutex in KIQ 2. Directly write to KIQ 
>> fence address instead of using fence_emit() 3. Disable the interrupt 
>> for KIQ read/write and use CPU polling
> This list indicates that this patch should be split up in at least 
> three patches. :)
Yeah, apart from that is is not a good idea to mess with the fence internals directly in the KIQ code, please add a helper in the fence code for this.

Regards,
Christian.