[PATCH 07/15] drm/amd/display: Surface Validation Fixes + Audio Mask

Harry Wentland harry.wentland at amd.com
Wed Mar 1 00:26:12 UTC 2017


From: Leon Elazar <leon.elazar at amd.com>

1. dc: Adding missing mask for audio register DCCG_AUDIO_DTO_SOURCE
2. Changing the surface validation to check the limits of the clip rect instead of the source rect.

Change-Id: Ica0d1a8543f958e20bd94a27ebe1a1fd805e1dbf
Signed-off-by: Leon Elazar <leon.elazar at amd.com>
Acked-by: Harry Wentland <Harry.Wentland at amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng at amd.com>
---
 drivers/gpu/drm/amd/display/dc/dce/dce_audio.h          | 1 +
 drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c | 8 ++++----
 drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c | 4 ++--
 drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c   | 4 ++--
 4 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_audio.h b/drivers/gpu/drm/amd/display/dc/dce/dce_audio.h
index b98ee2d2a9c7..0dc5ff137c7a 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_audio.h
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_audio.h
@@ -48,6 +48,7 @@
 #define AUD_COMMON_MASK_SH_LIST_BASE(mask_sh)\
 		SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO0_SOURCE_SEL, mask_sh),\
 		SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO_SEL, mask_sh),\
+		SF(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO2_USE_512FBR_DTO, mask_sh),\
 		SF(DCCG_AUDIO_DTO0_MODULE, DCCG_AUDIO_DTO0_MODULE, mask_sh),\
 		SF(DCCG_AUDIO_DTO0_PHASE, DCCG_AUDIO_DTO0_PHASE, mask_sh),\
 		SF(DCCG_AUDIO_DTO1_MODULE, DCCG_AUDIO_DTO1_MODULE, mask_sh),\
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
index cd3942df70a7..80b2359a3cb4 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_resource.c
@@ -1009,10 +1009,10 @@ static bool dce110_validate_surface_sets(
 		if (set[i].surface_count > 2)
 			return false;
 
-		if (set[i].surfaces[0]->src_rect.width
-				< set[i].stream->src.width
-				|| set[i].surfaces[0]->src_rect.height
-				< set[i].stream->src.height)
+		if (set[i].surfaces[0]->clip_rect.width
+				> set[i].stream->src.width
+				|| set[i].surfaces[0]->clip_rect.height
+				> set[i].stream->src.height)
 			return false;
 		if (set[i].surfaces[0]->format
 				>= SURFACE_PIXEL_FORMAT_VIDEO_BEGIN)
diff --git a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c
index 526c106f6ebf..ce6c69fd1041 100644
--- a/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce112/dce112_resource.c
@@ -975,9 +975,9 @@ static bool dce112_validate_surface_sets(
 			return false;
 
 		if (set[i].surfaces[0]->clip_rect.width
-				< set[i].stream->src.width
+				> set[i].stream->src.width
 				|| set[i].surfaces[0]->clip_rect.height
-				< set[i].stream->src.height)
+				> set[i].stream->src.height)
 			return false;
 		if (set[i].surfaces[0]->format
 				>= SURFACE_PIXEL_FORMAT_VIDEO_BEGIN)
diff --git a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
index 272c7fc31406..fbbdd0ee2d4c 100644
--- a/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dce80/dce80_resource.c
@@ -805,9 +805,9 @@ static bool dce80_validate_surface_sets(
 			return false;
 
 		if (set[i].surfaces[0]->clip_rect.width
-				!= set[i].stream->src.width
+				> set[i].stream->src.width
 				|| set[i].surfaces[0]->clip_rect.height
-				!= set[i].stream->src.height)
+				> set[i].stream->src.height)
 			return false;
 		if (set[i].surfaces[0]->format
 				>= SURFACE_PIXEL_FORMAT_VIDEO_BEGIN)
-- 
2.9.3



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