[PATCH 02/22] drm/amdgpu: doorbell registers need only be set once v2
Andres Rodriguez
andresx7 at gmail.com
Thu Mar 2 07:03:04 UTC 2017
The CP_MEC_DOORBELL_RANGE_* and CP_PQ_STATUS.DOORBELL_ENABLE registers
are not HQD specific.
They only need to be set once if at least 1 pipe requested doorbell
support.
v2: move doorbell_enable to amdgpu_gfx instead of amdgpu_device
Signed-off-by: Andres Rodriguez <andresx7 at gmail.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 +++
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 6 +++++-
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index e9af031..d699c3b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -899,6 +899,9 @@ struct amdgpu_gfx {
/* reset mask */
uint32_t grbm_soft_reset;
uint32_t srbm_soft_reset;
+
+ /* doorbell */
+ bool doorbell_enabled;
};
int amdgpu_ib_get(struct amdgpu_device *adev, struct amdgpu_vm *vm,
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 1c8589a..044449a 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -4804,7 +4804,7 @@ static void gfx_v8_0_enable_doorbell(struct amdgpu_device *adev, bool enable)
{
uint32_t tmp;
- if (!enable)
+ if (!enable || adev->gfx.doorbell_enabled)
return;
if ((adev->asic_type == CHIP_CARRIZO) ||
@@ -4819,6 +4819,8 @@ static void gfx_v8_0_enable_doorbell(struct amdgpu_device *adev, bool enable)
tmp = RREG32(mmCP_PQ_STATUS);
tmp = REG_SET_FIELD(tmp, CP_PQ_STATUS, DOORBELL_ENABLE, 1);
WREG32(mmCP_PQ_STATUS, tmp);
+
+ adev->gfx.doorbell_enabled = true;
}
static int gfx_v8_0_mqd_commit(struct amdgpu_device *adev, struct vi_mqd *mqd)
@@ -5116,6 +5118,8 @@ static int gfx_v8_0_cp_resume(struct amdgpu_device *adev)
{
int r;
+ adev->gfx.doorbell_enabled = false;
+
if (!(adev->flags & AMD_IS_APU))
gfx_v8_0_enable_gui_idle_interrupt(adev, false);
--
2.9.3
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