[PATCH 15/22] drm/amdgpu: add a mechanism to untie user ring ids from kernel ring ids

Christian K├Ânig deathsimple at vodafone.de
Thu Mar 2 11:16:48 UTC 2017


Am 02.03.2017 um 09:02 schrieb Andres Rodriguez:
> Add amdgpu_queue_mgr, a mechanism that allows disjointing usermode's
> ring ids from the kernel's ring ids.
>
> The queue manager maintains a per-file descriptor map of user ring ids
> to amdgpu_ring pointers. Once a map is created it is permanent (this is
> required to maintain FIFO execution guarantees for a context's ring).
>
> Different queue map policies can be configured for each HW IP.
> Currently all HW IPs use the identity mapper, i.e. kernel ring id is
> equal to the user ring id.
>
> The purpose of this mechanism is to distribute the load across multiple
> queues more effectively for HW IPs that support multiple rings.
> Userspace clients are unable to check whether a specific resource is in
> use by a different client. Therefore, it is up to the kernel driver to
> make the optimal choice.
>
> Signed-off-by: Andres Rodriguez <andresx7 at gmail.com>
> ---
>   drivers/gpu/drm/amd/amdgpu/Makefile           |   2 +-
>   drivers/gpu/drm/amd/amdgpu/amdgpu.h           |  31 ++++-
>   drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c        |  70 ++++--------
>   drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c       |   3 +
>   drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c | 157 ++++++++++++++++++++++++++
>   drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.h |  75 ++++++++++++
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c      |  45 ++++++++
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h      |   2 +
>   8 files changed, 333 insertions(+), 52 deletions(-)
>   create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c
>   create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.h
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile
> index 2814aad..0081d0c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/Makefile
> +++ b/drivers/gpu/drm/amd/amdgpu/Makefile
> @@ -24,7 +24,7 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
>   	atombios_encoders.o amdgpu_sa.o atombios_i2c.o \
>   	amdgpu_prime.o amdgpu_vm.o amdgpu_ib.o amdgpu_pll.o \
>   	amdgpu_ucode.o amdgpu_bo_list.o amdgpu_ctx.o amdgpu_sync.o \
> -	amdgpu_gtt_mgr.o amdgpu_vram_mgr.o amdgpu_virt.o
> +	amdgpu_gtt_mgr.o amdgpu_vram_mgr.o amdgpu_virt.o amdgpu_queue_mgr.o
>   
>   # add asic specific block
>   amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o cik_ih.o kv_smc.o kv_dpm.o \
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 377f58a..dc79c0e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -696,6 +696,31 @@ void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr);
>   void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr);
>   
>   /*
> + * Queue manager related structures
> + */
> +struct amdgpu_queue_mapper;
> +
> +struct amdgpu_queue_mapper_funcs {
> +	/* map a userspace ring id to a kernel ring id */
> +	int (*map)(struct amdgpu_device *adev,
> +		   struct amdgpu_queue_mapper *mapper,
> +		   int ring,
> +		   struct amdgpu_ring **out_ring);
> +};

Don't add indirection if you don't abstract any hardware difference with it.

Just call the appropriate mapping function directly based on the ring type.

Regards,
Christian.

> +
> +struct amdgpu_queue_mapper {
> +	struct amdgpu_queue_mapper_funcs *funcs;
> +	int 		hw_ip;
> +	struct mutex	lock;
> +	/* protected by lock */
> +	struct amdgpu_ring *queue_map[AMDGPU_MAX_RINGS];
> +};
> +
> +struct amdgpu_queue_mgr {
> +	struct amdgpu_queue_mapper mapper[AMDGPU_MAX_IP_NUM];
> +};
> +
> +/*
>    * file private structure
>    */
>   
> @@ -704,6 +729,7 @@ struct amdgpu_fpriv {
>   	struct mutex		bo_list_lock;
>   	struct idr		bo_list_handles;
>   	struct amdgpu_ctx_mgr	ctx_mgr;
> +	struct amdgpu_queue_mgr queue_mgr;
>   };
>   
>   /*
> @@ -1730,8 +1756,9 @@ bool amdgpu_need_post(struct amdgpu_device *adev);
>   void amdgpu_update_display_priority(struct amdgpu_device *adev);
>   
>   int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data);
> -int amdgpu_cs_get_ring(struct amdgpu_device *adev, u32 ip_type,
> -		       u32 ip_instance, u32 ring,
> +int amdgpu_cs_get_ring(struct amdgpu_device *adev,
> +		       struct amdgpu_queue_mgr *mgr,
> +		       u32 ip_type, u32 ip_instance, u32 user_ring,
>   		       struct amdgpu_ring **out_ring);
>   void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev, u64 num_bytes);
>   void amdgpu_ttm_placement_from_domain(struct amdgpu_bo *abo, u32 domain);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> index 57301f5..605d40e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> @@ -29,60 +29,28 @@
>   #include <drm/amdgpu_drm.h>
>   #include "amdgpu.h"
>   #include "amdgpu_trace.h"
> +#include "amdgpu_queue_mgr.h"
>   
> -int amdgpu_cs_get_ring(struct amdgpu_device *adev, u32 ip_type,
> -		       u32 ip_instance, u32 ring,
> +int amdgpu_cs_get_ring(struct amdgpu_device *adev,
> +		       struct amdgpu_queue_mgr *mgr,
> +		       u32 ip_type, u32 ip_instance, u32 user_ring,
>   		       struct amdgpu_ring **out_ring)
>   {
> +	int r;
> +
>   	/* Right now all IPs have only one instance - multiple rings. */
>   	if (ip_instance != 0) {
>   		DRM_ERROR("invalid ip instance: %d\n", ip_instance);
>   		return -EINVAL;
>   	}
>   
> -	switch (ip_type) {
> -	default:
> -		DRM_ERROR("unknown ip type: %d\n", ip_type);
> -		return -EINVAL;
> -	case AMDGPU_HW_IP_GFX:
> -		if (ring < adev->gfx.num_gfx_rings) {
> -			*out_ring = &adev->gfx.gfx_ring[ring];
> -		} else {
> -			DRM_ERROR("only %d gfx rings are supported now\n",
> -				  adev->gfx.num_gfx_rings);
> -			return -EINVAL;
> -		}
> -		break;
> -	case AMDGPU_HW_IP_COMPUTE:
> -		if (ring < adev->gfx.num_compute_rings) {
> -			*out_ring = &adev->gfx.compute_ring[ring];
> -		} else {
> -			DRM_ERROR("only %d compute rings are supported now\n",
> -				  adev->gfx.num_compute_rings);
> -			return -EINVAL;
> -		}
> -		break;
> -	case AMDGPU_HW_IP_DMA:
> -		if (ring < adev->sdma.num_instances) {
> -			*out_ring = &adev->sdma.instance[ring].ring;
> -		} else {
> -			DRM_ERROR("only %d SDMA rings are supported\n",
> -				  adev->sdma.num_instances);
> -			return -EINVAL;
> -		}
> -		break;
> -	case AMDGPU_HW_IP_UVD:
> -		*out_ring = &adev->uvd.ring;
> -		break;
> -	case AMDGPU_HW_IP_VCE:
> -		if (ring < adev->vce.num_rings){
> -			*out_ring = &adev->vce.ring[ring];
> -		} else {
> -			DRM_ERROR("only %d VCE rings are supported\n", adev->vce.num_rings);
> -			return -EINVAL;
> -		}
> -		break;
> +	r = amdgpu_queue_mgr_map(adev, mgr, ip_type, user_ring, out_ring);
> +	if (r) {
> +		DRM_ERROR("unable to map userspace ip:%d ring:%d to kernel ring\n",
> +				ip_type, user_ring);
> +		return r;
>   	}
> +
>   	return 0;
>   }
>   
> @@ -875,7 +843,7 @@ static int amdgpu_cs_ib_fill(struct amdgpu_device *adev,
>   		if (chunk->chunk_id != AMDGPU_CHUNK_ID_IB)
>   			continue;
>   
> -		r = amdgpu_cs_get_ring(adev, chunk_ib->ip_type,
> +		r = amdgpu_cs_get_ring(adev, &fpriv->queue_mgr, chunk_ib->ip_type,
>   				       chunk_ib->ip_instance, chunk_ib->ring,
>   				       &ring);
>   		if (r)
> @@ -979,7 +947,8 @@ static int amdgpu_cs_dependencies(struct amdgpu_device *adev,
>   			struct amdgpu_ctx *ctx;
>   			struct dma_fence *fence;
>   
> -			r = amdgpu_cs_get_ring(adev, deps[j].ip_type,
> +			r = amdgpu_cs_get_ring(adev, &fpriv->queue_mgr,
> +					       deps[j].ip_type,
>   					       deps[j].ip_instance,
>   					       deps[j].ring, &ring);
>   			if (r)
> @@ -1106,6 +1075,7 @@ int amdgpu_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
>   int amdgpu_cs_wait_ioctl(struct drm_device *dev, void *data,
>   			 struct drm_file *filp)
>   {
> +	struct amdgpu_fpriv *fpriv = filp->driver_priv;
>   	union drm_amdgpu_wait_cs *wait = data;
>   	struct amdgpu_device *adev = dev->dev_private;
>   	unsigned long timeout = amdgpu_gem_timeout(wait->in.timeout);
> @@ -1114,7 +1084,8 @@ int amdgpu_cs_wait_ioctl(struct drm_device *dev, void *data,
>   	struct dma_fence *fence;
>   	long r;
>   
> -	r = amdgpu_cs_get_ring(adev, wait->in.ip_type, wait->in.ip_instance,
> +	r = amdgpu_cs_get_ring(adev, &fpriv->queue_mgr,
> +			       wait->in.ip_type, wait->in.ip_instance,
>   			       wait->in.ring, &ring);
>   	if (r)
>   		return r;
> @@ -1156,10 +1127,11 @@ static struct dma_fence *amdgpu_cs_get_fence(struct amdgpu_device *adev,
>   	struct amdgpu_ring *ring;
>   	struct amdgpu_ctx *ctx;
>   	struct dma_fence *fence;
> +	struct amdgpu_fpriv *fpriv = filp->driver_priv;
>   	int r;
>   
> -	r = amdgpu_cs_get_ring(adev, user->ip_type, user->ip_instance,
> -			       user->ring, &ring);
> +	r = amdgpu_cs_get_ring(adev, &fpriv->queue_mgr, user->ip_type,
> +			       user->ip_instance, user->ring, &ring);
>   	if (r)
>   		return ERR_PTR(r);
>   
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> index 61d94c7..0932ade 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> @@ -30,6 +30,7 @@
>   #include <drm/amdgpu_drm.h>
>   #include "amdgpu_uvd.h"
>   #include "amdgpu_vce.h"
> +#include "amdgpu_queue_mgr.h"
>   
>   #include <linux/vga_switcheroo.h>
>   #include <linux/slab.h>
> @@ -665,6 +666,7 @@ int amdgpu_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv)
>   	idr_init(&fpriv->bo_list_handles);
>   
>   	amdgpu_ctx_mgr_init(&fpriv->ctx_mgr);
> +	amdgpu_queue_mgr_init(adev, &fpriv->queue_mgr);
>   
>   	file_priv->driver_priv = fpriv;
>   
> @@ -694,6 +696,7 @@ void amdgpu_driver_postclose_kms(struct drm_device *dev,
>   	if (!fpriv)
>   		return;
>   
> +	amdgpu_queue_mgr_fini(adev, &fpriv->queue_mgr);
>   	amdgpu_ctx_mgr_fini(&fpriv->ctx_mgr);
>   
>   	amdgpu_uvd_free_handles(adev, file_priv);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c
> new file mode 100644
> index 0000000..3918bdb
> --- /dev/null
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.c
> @@ -0,0 +1,157 @@
> +/*
> + * Copyright 2017 Valve Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + *
> + * Authors: Andres Rodriguez
> + */
> +
> +#include "amdgpu_ring.h"
> +#include "amdgpu_queue_mgr.h"
> +
> +static int amdgpu_queue_mapper_init(struct amdgpu_queue_mapper *mapper,
> +				    int hw_ip,
> +				    struct amdgpu_queue_mapper_funcs *funcs)
> +{
> +	if (!mapper || !funcs)
> +		return -EINVAL;
> +
> +	if (hw_ip > AMDGPU_MAX_IP_NUM)
> +		return -EINVAL;
> +
> +	mapper->hw_ip = hw_ip;
> +	mapper->funcs = funcs;
> +	mutex_init(&mapper->lock);
> +
> +	memset(mapper->queue_map, 0, sizeof(mapper->queue_map));
> +
> +	return 0;
> +}
> +
> +static struct amdgpu_ring *get_cached_map(struct amdgpu_queue_mapper *mapper,
> +					  int ring)
> +{
> +	return mapper->queue_map[ring];
> +}
> +
> +static int update_cached_map(struct amdgpu_queue_mapper *mapper,
> +			     int ring, struct amdgpu_ring *pring)
> +{
> +	if (WARN_ON(mapper->queue_map[ring])) {
> +		DRM_ERROR("Un-expected ring re-map\n");
> +		return -EINVAL;
> +	}
> +
> +	mapper->queue_map[ring] = pring;
> +
> +	return 0;
> +}
> +
> +static int amdgpu_identity_map(struct amdgpu_device *adev,
> +			       struct amdgpu_queue_mapper *mapper,
> +			       int ring,
> +			       struct amdgpu_ring **out_ring)
> +{
> +	switch (mapper->hw_ip) {
> +	case AMDGPU_HW_IP_GFX:
> +		*out_ring = &adev->gfx.gfx_ring[ring];
> +		break;
> +	case AMDGPU_HW_IP_COMPUTE:
> +		*out_ring = &adev->gfx.compute_ring[ring];
> +		break;
> +	case AMDGPU_HW_IP_DMA:
> +		*out_ring = &adev->sdma.instance[ring].ring;
> +		break;
> +	case AMDGPU_HW_IP_UVD:
> +		*out_ring = &adev->uvd.ring;
> +		break;
> +	case AMDGPU_HW_IP_VCE:
> +		*out_ring = &adev->vce.ring[ring];
> +		break;
> +	default:
> +		*out_ring = NULL;
> +		DRM_ERROR("unknown HW IP type: %d\n", mapper->hw_ip);
> +		return -EINVAL;
> +	}
> +
> +	return update_cached_map(mapper, ring, *out_ring);
> +}
> +
> +static struct amdgpu_queue_mapper_funcs identity_mapper = {
> +	.map = amdgpu_identity_map
> +};
> +
> +int amdgpu_queue_mgr_init(struct amdgpu_device *adev,
> +			  struct amdgpu_queue_mgr *mgr)
> +{
> +	int i;
> +
> +	if (!adev || !mgr)
> +		return -EINVAL;
> +
> +	memset(mgr, 0, sizeof(*mgr));
> +
> +	for (i = 0; i < AMDGPU_MAX_IP_NUM; ++i)
> +		amdgpu_queue_mapper_init(&mgr->mapper[i], i, &identity_mapper);
> +
> +	return 0;
> +}
> +
> +int amdgpu_queue_mgr_fini(struct amdgpu_device *adev,
> +			  struct amdgpu_queue_mgr *mgr)
> +{
> +	return 0;
> +}
> +
> +int amdgpu_queue_mgr_map(struct amdgpu_device *adev,
> +			 struct amdgpu_queue_mgr *mgr,
> +			 int hw_ip, int ring,
> +			 struct amdgpu_ring **out_ring)
> +{
> +	int r;
> +	struct amdgpu_queue_mapper *mapper = &mgr->mapper[hw_ip];
> +
> +	if (!adev || !mgr || !out_ring)
> +		return -EINVAL;
> +
> +	if (hw_ip >= AMDGPU_MAX_IP_NUM)
> +		return -EINVAL;
> +
> +	if (ring >= AMDGPU_MAX_RINGS)
> +		return -EINVAL;
> +
> +	r = amdgpu_ring_is_valid_index(adev, hw_ip, ring);
> +	if (r)
> +		return r;
> +
> +	mutex_lock(&mapper->lock);
> +
> +	*out_ring = get_cached_map(mapper, ring);
> +	if (*out_ring) {
> +		/* cache hit */
> +		r = 0;
> +		goto out_unlock;
> +	}
> +
> +	r = mapper->funcs->map(adev, mapper, ring, out_ring);
> +
> +out_unlock:
> +	mutex_unlock(&mapper->lock);
> +	return r;
> +}
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.h
> new file mode 100644
> index 0000000..a85bb32
> --- /dev/null
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_queue_mgr.h
> @@ -0,0 +1,75 @@
> +/*
> + * Copyright 2017 Valve Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + *
> + * Authors:
> + * 	Andres Rodriguez <andresx7 at gmail.com>
> + */
> +
> +#ifndef __AMDGPU_QUEUE_MGR_H__
> +#define __AMDGPU_QUEUE_MGR_H__
> +
> +#include "amdgpu.h"
> +
> +/**
> + * amdgpu_queue_mgr_init - init an amdgpu_queue_mgr struct
> + *
> + * @adev: amdgpu_device pointer
> + * @mgr: amdgpu_queue_mgr structure holding queue information
> + *
> + * Initialize the the selected @mgr (all asics).
> + *
> + * Returns 0 on success, error on failure.
> + */
> +int amdgpu_queue_mgr_init(struct amdgpu_device *adev,
> +			  struct amdgpu_queue_mgr *mgr);
> +
> +/**
> + * amdgpu_queue_mgr_fini - de-initialize an amdgpu_queue_mgr struct
> + *
> + * @adev: amdgpu_device pointer
> + * @mgr: amdgpu_queue_mgr structure holding queue information
> + *
> + * De-initialize the the selected @mgr (all asics).
> + *
> + * Returns 0 on success, error on failure.
> + */
> +int amdgpu_queue_mgr_fini(struct amdgpu_device *adev,
> +			  struct amdgpu_queue_mgr *mgr);
> +
> +/**
> + * amdgpu_queue_mgr_map - Map a userspace ring id to an amdgpu_ring
> + *
> + * @adev: amdgpu_device pointer
> + * @mgr: amdgpu_queue_mgr structure holding queue information
> + * @hw_ip: HW IP enum
> + * @ring: user ring id
> + * @our_ring: pointer to mapped amdgpu_ring
> + *
> + * Map a userspace ring id to an appropriate kernel ring. Different
> + * policies are configurable at a HW IP level.
> + *
> + * Returns 0 on success, error on failure.
> + */
> +int amdgpu_queue_mgr_map(struct amdgpu_device *adev,
> +			 struct amdgpu_queue_mgr *mgr,
> +			 int hw_ip, int ring,
> +			 struct amdgpu_ring **out_ring);
> +#endif
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
> index 7c842b7..43cd539 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
> @@ -52,6 +52,51 @@ static int amdgpu_debugfs_ring_init(struct amdgpu_device *adev,
>   static void amdgpu_debugfs_ring_fini(struct amdgpu_ring *ring);
>   
>   /**
> + * amdgpu_ring_is_valid_index - check if a ring idex is valid for a HW IP
> + *
> + * @adev: amdgpu_device pointer
> + * @ip_type: The HW IP to check against
> + * @ring: the ring index
> + *
> + * Check if @ring is a valid index for @ip_type (all asics).
> + * Returns 0 on success, error on failure.
> + */
> +int amdgpu_ring_is_valid_index(struct amdgpu_device *adev,
> +			       int ip_type, int ring)
> +{
> +	int ip_num_rings;
> +
> +	switch (ip_type) {
> +	case AMDGPU_HW_IP_GFX:
> +		ip_num_rings = adev->gfx.num_gfx_rings;
> +		break;
> +	case AMDGPU_HW_IP_COMPUTE:
> +		ip_num_rings = adev->gfx.num_compute_rings;
> +		break;
> +	case AMDGPU_HW_IP_DMA:
> +		ip_num_rings = adev->sdma.num_instances;
> +		break;
> +	case AMDGPU_HW_IP_UVD:
> +		ip_num_rings = 1;
> +		break;
> +	case AMDGPU_HW_IP_VCE:
> +		ip_num_rings = adev->vce.num_rings;
> +		break;
> +	default:
> +		DRM_ERROR("unknown ip type: %d\n", ip_type);
> +		return -EINVAL;
> +	}
> +
> +	if (ring >= ip_num_rings) {
> +		DRM_ERROR("Ring index:%d exceeds maximum:%d for ip:%d\n",
> +				ring, ip_num_rings, ip_type);
> +		return -EINVAL;
> +	}
> +
> +	return 0;
> +}
> +
> +/**
>    * amdgpu_ring_alloc - allocate space on the ring buffer
>    *
>    * @adev: amdgpu_device pointer
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> index 2345b398..35da5c5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
> @@ -175,6 +175,8 @@ struct amdgpu_ring {
>   #endif
>   };
>   
> +int amdgpu_ring_is_valid_index(struct amdgpu_device *adev,
> +			       int hw_ip, int ring);
>   int amdgpu_ring_alloc(struct amdgpu_ring *ring, unsigned ndw);
>   void amdgpu_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count);
>   void amdgpu_ring_generic_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib);




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