[PATCH 3/3] drm/amdgpu: refine vce_3.0 code.

Alex Deucher alexdeucher at gmail.com
Mon Mar 13 14:54:57 UTC 2017


On Mon, Mar 13, 2017 at 4:51 AM, Rex Zhu <Rex.Zhu at amd.com> wrote:
> fix logic error in hw_fini and
> set_clockgating_state functions.
>
> Change-Id: I1e3f241f300b3c561df695b38b19c7a89160db25
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>

Series is:
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>


> ---
>  drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 16 +++++++---------
>  1 file changed, 7 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
> index 5705e81..97ff9ad 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
> @@ -65,7 +65,8 @@
>  static void vce_v3_0_set_ring_funcs(struct amdgpu_device *adev);
>  static void vce_v3_0_set_irq_funcs(struct amdgpu_device *adev);
>  static int vce_v3_0_wait_for_idle(void *handle);
> -
> +static int vce_v3_0_set_clockgating_state(void *handle,
> +                                         enum amd_clockgating_state state);
>  /**
>   * vce_v3_0_ring_get_rptr - get read pointer
>   *
> @@ -305,12 +306,8 @@ static int vce_v3_0_stop(struct amdgpu_device *adev)
>                 /* hold on ECPU */
>                 WREG32_FIELD(VCE_SOFT_RESET, ECPU_SOFT_RESET, 1);
>
> -               /* clear BUSY flag */
> -               WREG32_FIELD(VCE_STATUS, JOB_BUSY, 0);
> -
> -               /* Set Clock-Gating off */
> -               if (adev->cg_flags & AMD_CG_SUPPORT_VCE_MGCG)
> -                       vce_v3_0_set_vce_sw_clock_gating(adev, false);
> +               /* clear VCE STATUS */
> +               WREG32(mmVCE_STATUS, 0);
>         }
>
>         WREG32(mmGRBM_GFX_INDEX, mmGRBM_GFX_INDEX_DEFAULT);
> @@ -461,7 +458,8 @@ static int vce_v3_0_hw_fini(void *handle)
>         if (r)
>                 return r;
>
> -       return vce_v3_0_stop(adev);
> +       vce_v3_0_stop(adev);
> +       return vce_v3_0_set_clockgating_state(adev, AMD_CG_STATE_GATE);
>  }
>
>  static int vce_v3_0_suspend(void *handle)
> @@ -728,7 +726,7 @@ static int vce_v3_0_set_clockgating_state(void *handle,
>
>                 WREG32(mmGRBM_GFX_INDEX, GET_VCE_INSTANCE(i));
>
> -               if (enable) {
> +               if (!enable) {
>                         /* initialize VCE_CLOCK_GATING_A: Clock ON/OFF delay */
>                         uint32_t data = RREG32(mmVCE_CLOCK_GATING_A);
>                         data &= ~(0xf | 0xff0);
> --
> 1.9.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx at lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx


More information about the amd-gfx mailing list