[PATCH 7/8] drm/amdgpu/gfx8: reduce the functon params for mpq setup
Alex Deucher
alexdeucher at gmail.com
Thu Mar 23 15:55:07 UTC 2017
Everything we need is in the ring structure. No need to
pass all the bits explicitly.
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 32 ++++++++++++++------------------
1 file changed, 14 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 3f710b8..bf608c8 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -4664,12 +4664,11 @@ static void gfx_v8_0_map_queue_enable(struct amdgpu_ring *kiq_ring,
udelay(50);
}
-static int gfx_v8_0_mqd_init(struct amdgpu_device *adev,
+static int gfx_v8_0_mqd_init(struct amdgpu_ring *ring,
struct vi_mqd *mqd,
- uint64_t mqd_gpu_addr,
- uint64_t eop_gpu_addr,
- struct amdgpu_ring *ring)
+ uint64_t eop_gpu_addr)
{
+ struct amdgpu_device *adev = ring->adev;
uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr;
uint32_t tmp;
@@ -4710,8 +4709,8 @@ static int gfx_v8_0_mqd_init(struct amdgpu_device *adev,
mqd->cp_hqd_pq_wptr = 0;
/* set the pointer to the MQD */
- mqd->cp_mqd_base_addr_lo = mqd_gpu_addr & 0xfffffffc;
- mqd->cp_mqd_base_addr_hi = upper_32_bits(mqd_gpu_addr);
+ mqd->cp_mqd_base_addr_lo = ring->mqd_gpu_addr & 0xfffffffc;
+ mqd->cp_mqd_base_addr_hi = upper_32_bits(ring->mqd_gpu_addr);
/* set MQD vmid to 0 */
tmp = RREG32(mmCP_MQD_CONTROL);
@@ -4784,10 +4783,10 @@ static int gfx_v8_0_mqd_init(struct amdgpu_device *adev,
return 0;
}
-static int gfx_v8_0_kiq_init_register(struct amdgpu_device *adev,
- struct vi_mqd *mqd,
- struct amdgpu_ring *ring)
+static int gfx_v8_0_kiq_init_register(struct amdgpu_ring *ring,
+ struct vi_mqd *mqd)
{
+ struct amdgpu_device *adev = ring->adev;
uint32_t tmp;
int j;
@@ -4876,8 +4875,7 @@ static int gfx_v8_0_kiq_init_register(struct amdgpu_device *adev,
}
static int gfx_v8_0_kiq_init_queue(struct amdgpu_ring *ring,
- struct vi_mqd *mqd,
- u64 mqd_gpu_addr)
+ struct vi_mqd *mqd)
{
struct amdgpu_device *adev = ring->adev;
struct amdgpu_kiq *kiq = &adev->gfx.kiq;
@@ -4898,9 +4896,9 @@ static int gfx_v8_0_kiq_init_queue(struct amdgpu_ring *ring,
memset((void *)mqd, 0, sizeof(*mqd));
mutex_lock(&adev->srbm_mutex);
vi_srbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
- gfx_v8_0_mqd_init(adev, mqd, mqd_gpu_addr, eop_gpu_addr, ring);
+ gfx_v8_0_mqd_init(ring, mqd, eop_gpu_addr);
if (is_kiq)
- gfx_v8_0_kiq_init_register(adev, mqd, ring);
+ gfx_v8_0_kiq_init_register(ring, mqd);
vi_srbm_select(adev, 0, 0, 0, 0);
mutex_unlock(&adev->srbm_mutex);
@@ -4918,7 +4916,7 @@ static int gfx_v8_0_kiq_init_queue(struct amdgpu_ring *ring,
if (is_kiq) {
mutex_lock(&adev->srbm_mutex);
vi_srbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
- gfx_v8_0_kiq_init_register(adev, mqd, ring);
+ gfx_v8_0_kiq_init_register(ring, mqd);
vi_srbm_select(adev, 0, 0, 0, 0);
mutex_unlock(&adev->srbm_mutex);
}
@@ -4948,8 +4946,7 @@ static int gfx_v8_0_kiq_resume(struct amdgpu_device *adev)
r = amdgpu_bo_kmap(ring->mqd_obj, &ring->mqd_ptr);
if (!r) {
r = gfx_v8_0_kiq_init_queue(ring,
- (struct vi_mqd *)ring->mqd_ptr,
- ring->mqd_gpu_addr);
+ (struct vi_mqd *)ring->mqd_ptr);
amdgpu_bo_kunmap(ring->mqd_obj);
ring->mqd_ptr = NULL;
}
@@ -4973,8 +4970,7 @@ static int gfx_v8_0_kiq_resume(struct amdgpu_device *adev)
r = amdgpu_bo_kmap(ring->mqd_obj, &ring->mqd_ptr);
if (!r) {
r = gfx_v8_0_kiq_init_queue(ring,
- (struct vi_mqd *)ring->mqd_ptr,
- ring->mqd_gpu_addr);
+ (struct vi_mqd *)ring->mqd_ptr);
amdgpu_bo_kunmap(ring->mqd_obj);
ring->mqd_ptr = NULL;
}
--
2.5.5
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