[PATCH 1/2] drm/amdgpu: drop GB_GPU_ID from the golden settings

[Alex Deucher]

On Fri, Mar 24, 2017 at 11:09 AM, Christian König
<deathsimple at vodafone.de> wrote:
> From: Christian König <christian.koenig at amd.com>
>
> That register is marked deprecated, reading it results in a bus error.
>
> Signed-off-by: Christian König <christian.koenig at amd.com>

Might want to compare with the latest golden register list in CAIL to
see if it's already removed and pick up any additional changes if
there are any.  Otherwise:
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

Alex

> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 1 -
>  1 file changed, 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index ad82ab7..b196431 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -88,7 +88,6 @@ static const struct amdgpu_gds_reg_offset amdgpu_gds_reg_offset[] =
>  static const u32 golden_settings_gc_9_0[] =
>  {
>         SOC15_REG_OFFSET(GC, 0, mmDB_DEBUG2), 0xf00ffeff, 0x00000400,
> -       SOC15_REG_OFFSET(GC, 0, mmGB_GPU_ID), 0x0000000f, 0x00000000,
>         SOC15_REG_OFFSET(GC, 0, mmPA_SC_BINNER_EVENT_CNTL_3), 0x00000003, 0x82400024,
>         SOC15_REG_OFFSET(GC, 0, mmPA_SC_ENHANCE), 0x3fffffff, 0x00000001,
>         SOC15_REG_OFFSET(GC, 0, mmPA_SC_LINE_STIPPLE_STATE), 0x0000ff0f, 0x00000000,
> --
> 2.5.0
>
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