[PATCH 3/3] drm/amdgpu/soc15: drop support for reading some registers
Alex Deucher
alexdeucher at gmail.com
Mon Mar 27 18:46:42 UTC 2017
The RB harvest registers are not necessary, the driver already
exposes this info via the info ioctl. GB_BACKEND_MAP has
been deprecated since SI and is not relevant to the RB mapping.
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 23b9ae4..823566c 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -300,9 +300,6 @@ static struct amdgpu_allowed_register_entry soc15_allowed_read_registers[] = {
{ SOC15_REG_OFFSET(GC, 0, mmCP_CPC_STALLED_STAT1), false},
{ SOC15_REG_OFFSET(GC, 0, mmCP_CPC_STATUS), false},
{ SOC15_REG_OFFSET(GC, 0, mmGB_ADDR_CONFIG), false},
- { SOC15_REG_OFFSET(GC, 0, mmCC_RB_BACKEND_DISABLE), false, true},
- { SOC15_REG_OFFSET(GC, 0, mmGC_USER_RB_BACKEND_DISABLE), false, true},
- { SOC15_REG_OFFSET(GC, 0, mmGB_BACKEND_MAP), false, false},
};
static uint32_t soc15_read_indexed_register(struct amdgpu_device *adev, u32 se_num,
--
2.5.5
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