[PATCH] drm/amdgpu: Improve Vega10 VM fault handling

Deucher, Alexander Alexander.Deucher at amd.com
Tue Mar 28 13:27:24 UTC 2017


> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf
> Of Felix Kuehling
> Sent: Monday, March 27, 2017 6:25 PM
> To: amd-gfx at lists.freedesktop.org
> Cc: Kuehling, Felix
> Subject: [PATCH] drm/amdgpu: Improve Vega10 VM fault handling
> 
> Register AMDGPU_IH_CLIENTID_UTCL2 as a source of VM faults. Clean
> up the VM fault message format and use rate-limiting similar to
> other ASICs.
> 
> Signed-off-by: Felix Kuehling <Felix.Kuehling at amd.com>

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 19 +++++++++++++------
>  1 file changed, 13 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index 232c208..9831025 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -145,12 +145,17 @@ static int gmc_v9_0_process_interrupt(struct
> amdgpu_device *adev,
>  		WREG32_P(gfxhub->vm_l2_pro_fault_cntl, 1, ~1);
>  	}
> 
> -	DRM_ERROR("[%s]VMC page fault (src_id:%u ring:%u vm_id:%u
> pas_id:%u) "
> -		  "at page 0x%016llx from %d\n"
> -		  "VM_L2_PROTECTION_FAULT_STATUS:0x%08X\n",
> -		  entry->vm_id_src ? "mmhub" : "gfxhub",
> -		  entry->src_id, entry->ring_id, entry->vm_id, entry->pas_id,
> -		  addr, entry->client_id, status);
> +	if (printk_ratelimit()) {
> +		dev_err(adev->dev,
> +			"[%s] VMC page fault (src_id:%u ring:%u vm_id:%u
> pas_id:%u)\n",
> +			entry->vm_id_src ? "mmhub" : "gfxhub",
> +			entry->src_id, entry->ring_id, entry->vm_id,
> +			entry->pas_id);
> +		dev_err(adev->dev, "  at page 0x%016llx from %d\n",
> +			addr, entry->client_id);
> +		dev_err(adev->dev,
> "VM_L2_PROTECTION_FAULT_STATUS:0x%08X\n",
> +			status);
> +	}
> 
>  	return 0;
>  }
> @@ -539,6 +544,8 @@ static int gmc_v9_0_sw_init(void *handle)
>  	/* This interrupt is VMC page fault.*/
>  	r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_VMC, 0,
>  				&adev->mc.vm_fault);
> +	r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_UTCL2, 0,
> +				&adev->mc.vm_fault);
> 
>  	if (r)
>  		return r;
> --
> 1.9.1
> 
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