[PATCH 3/3] drm/amdgpu: Fix multi-level page table bugs for large BOs

[Felix Kuehling]

Fix the start/end address calculation for address ranges that span
multiple page directories in amdgpu_vm_alloc_levels.

Add WARN_ONs if page tables aren't found. Otherwise the page table
update would just fail silently.

Signed-off-by: Felix Kuehling <Felix.Kuehling at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 818747f..44aa039 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -278,6 +278,8 @@ static int amdgpu_vm_alloc_levels(struct amdgpu_device *adev,
 	from = (saddr >> shift) % amdgpu_vm_num_entries(adev, level);
 	to = (eaddr >> shift) % amdgpu_vm_num_entries(adev, level);
 
+	WARN_ON(from > to);
+
 	if (to > parent->last_entry_used)
 		parent->last_entry_used = to;
 
@@ -312,8 +314,11 @@ static int amdgpu_vm_alloc_levels(struct amdgpu_device *adev,
 		}
 
 		if (level < adev->vm_manager.num_level) {
-			r = amdgpu_vm_alloc_levels(adev, vm, entry, saddr,
-						   eaddr, level);
+			uint64_t sub_saddr = (pt_idx == from) ? saddr : 0;
+			uint64_t sub_eaddr = (pt_idx == to) ? eaddr :
+				((1 << shift) - 1);
+			r = amdgpu_vm_alloc_levels(adev, vm, entry, sub_saddr,
+						   sub_eaddr, level);
 			if (r)
 				return r;
 		}
@@ -957,9 +962,11 @@ static struct amdgpu_bo *amdgpu_vm_get_pt(struct amdgpu_pte_update_params *p,
 		entry = &entry->entries[idx];
 	}
 
-	if (level)
+	if (WARN_ON(level))
 		return NULL;
 
+	WARN_ON(!entry->bo);
+
 	return entry->bo;
 }
 
-- 
1.9.1