[PATCH 08/12] drm/amdgpu: split gfx_v9_0_kiq_init_queue into two

[Alex Deucher]

On Tue, May 2, 2017 at 4:34 AM, Liu, Monk <Monk.Liu at amd.com> wrote:
> Why only on GFX9?
>
> I think this logic should be equal to both GFX8/9

gfx8 is already split like this.  This whole series is a port of the
gfx8 code to gfx9.

Alex

>
> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf Of Alex Deucher
> Sent: Tuesday, May 02, 2017 6:29 AM
> To: amd-gfx at lists.freedesktop.org
> Cc: Deucher, Alexander <Alexander.Deucher at amd.com>
> Subject: [PATCH 08/12] drm/amdgpu: split gfx_v9_0_kiq_init_queue into two
>
> One for KIQ and one for the KCQ. This simplifies the logic and allows for future optimizations.
>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 63 +++++++++++++++++++++++------------
>  1 file changed, 42 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index ca30726..bc1a017 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -2166,25 +2166,18 @@ static int gfx_v9_0_kiq_init_register(struct amdgpu_ring *ring)  static int gfx_v9_0_kiq_init_queue(struct amdgpu_ring *ring)  {
>         struct amdgpu_device *adev = ring->adev;
> -       struct amdgpu_kiq *kiq = &adev->gfx.kiq;
>         struct v9_mqd *mqd = ring->mqd_ptr;
> -       bool is_kiq = (ring->funcs->type == AMDGPU_RING_TYPE_KIQ);
>         int mqd_idx = AMDGPU_MAX_COMPUTE_RINGS;
>         int r;
>
> -       if (is_kiq) {
> -               gfx_v9_0_kiq_setting(&kiq->ring);
> -       } else {
> -               mqd_idx = ring - &adev->gfx.compute_ring[0];
> -       }
> +       gfx_v9_0_kiq_setting(ring);
>
>         if (!adev->gfx.in_reset) {
>                 memset((void *)mqd, 0, sizeof(*mqd));
>                 mutex_lock(&adev->srbm_mutex);
>                 soc15_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
>                 gfx_v9_0_mqd_init(ring);
> -               if (is_kiq)
> -                       gfx_v9_0_kiq_init_register(ring);
> +               gfx_v9_0_kiq_init_register(ring);
>                 soc15_grbm_select(adev, 0, 0, 0, 0);
>                 mutex_unlock(&adev->srbm_mutex);
>
> @@ -2199,19 +2192,47 @@ static int gfx_v9_0_kiq_init_queue(struct amdgpu_ring *ring)
>                 ring->wptr = 0;
>                 amdgpu_ring_clear_ring(ring);
>
> -               if (is_kiq) {
> -                   mutex_lock(&adev->srbm_mutex);
> -                   soc15_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
> -                   gfx_v9_0_kiq_init_register(ring);
> -                   soc15_grbm_select(adev, 0, 0, 0, 0);
> -                   mutex_unlock(&adev->srbm_mutex);
> -               }
> +               mutex_lock(&adev->srbm_mutex);
> +               soc15_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
> +               gfx_v9_0_kiq_init_register(ring);
> +               soc15_grbm_select(adev, 0, 0, 0, 0);
> +               mutex_unlock(&adev->srbm_mutex);
>         }
>
> -       if (is_kiq)
> -               r = gfx_v9_0_kiq_enable(ring);
> -       else
> -               r = gfx_v9_0_map_queue_enable(&kiq->ring, ring);
> +       r = gfx_v9_0_kiq_enable(ring);
> +
> +       return r;
> +}
> +
> +static int gfx_v9_0_kcq_init_queue(struct amdgpu_ring *ring) {
> +       struct amdgpu_device *adev = ring->adev;
> +       struct amdgpu_kiq *kiq = &adev->gfx.kiq;
> +       struct v9_mqd *mqd = ring->mqd_ptr;
> +       int mqd_idx = ring - &adev->gfx.compute_ring[0];
> +       int r;
> +
> +       if (!adev->gfx.in_reset) {
> +               memset((void *)mqd, 0, sizeof(*mqd));
> +               mutex_lock(&adev->srbm_mutex);
> +               soc15_grbm_select(adev, ring->me, ring->pipe, ring->queue, 0);
> +               gfx_v9_0_mqd_init(ring);
> +               soc15_grbm_select(adev, 0, 0, 0, 0);
> +               mutex_unlock(&adev->srbm_mutex);
> +
> +               if (adev->gfx.mec.mqd_backup[mqd_idx])
> +                       memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(*mqd));
> +       } else { /* for GPU_RESET case */
> +               /* reset MQD to a clean status */
> +               if (adev->gfx.mec.mqd_backup[mqd_idx])
> +                       memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(*mqd));
> +
> +               /* reset ring buffer */
> +               ring->wptr = 0;
> +               amdgpu_ring_clear_ring(ring);
> +       }
> +
> +       r = gfx_v9_0_map_queue_enable(&kiq->ring, ring);
>
>         return r;
>  }
> @@ -2247,7 +2268,7 @@ static int gfx_v9_0_kiq_resume(struct amdgpu_device *adev)
>                         goto done;
>                 r = amdgpu_bo_kmap(ring->mqd_obj, (void **)&ring->mqd_ptr);
>                 if (!r) {
> -                       r = gfx_v9_0_kiq_init_queue(ring);
> +                       r = gfx_v9_0_kcq_init_queue(ring);
>                         amdgpu_bo_kunmap(ring->mqd_obj);
>                         ring->mqd_ptr = NULL;
>                 }
> --
> 2.5.5
>
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