[PATCH 4/6] drm/amdgpu:cleanups KIQ ring_funcs emit_frame_size

Yu, Xiangliang Xiangliang.Yu at amd.com
Wed May 3 06:33:54 UTC 2017


Reviewed-by: Xiangliang Yu <Xiangliang.Yu at amd.com>


Thanks!
Xiangliang Yu


> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf
> Of Monk Liu
> Sent: Wednesday, May 03, 2017 11:48 AM
> To: amd-gfx at lists.freedesktop.org
> Cc: Liu, Monk <Monk.Liu at amd.com>
> Subject: [PATCH 4/6] drm/amdgpu:cleanups KIQ ring_funcs emit_frame_size
> 
> since we don't need hdp flush/inval for KIQ anymore
> 
> Change-Id: I8518f479afebb73c68ef922880f92dae53b665b9
> Signed-off-by: Monk Liu <Monk.Liu at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 2 --
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 --
>  2 files changed, 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index 9629f3a..022a319 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -6988,8 +6988,6 @@ static const struct amdgpu_ring_funcs
> gfx_v8_0_ring_funcs_kiq = {
>  	.set_wptr = gfx_v8_0_ring_set_wptr_compute,
>  	.emit_frame_size =
>  		20 + /* gfx_v8_0_ring_emit_gds_switch */
> -		7 + /* gfx_v8_0_ring_emit_hdp_flush */
> -		5 + /* gfx_v8_0_ring_emit_hdp_invalidate */
>  		7 + /* gfx_v8_0_ring_emit_pipeline_sync */
>  		17 + /* gfx_v8_0_ring_emit_vm_flush */
>  		7 + 7 + 7, /* gfx_v8_0_ring_emit_fence_kiq x3 for user fence,
> vm fence */ diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 2b2a2c2..6d5b66c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -3620,8 +3620,6 @@ static const struct amdgpu_ring_funcs
> gfx_v9_0_ring_funcs_kiq = {
>  	.set_wptr = gfx_v9_0_ring_set_wptr_compute,
>  	.emit_frame_size =
>  		20 + /* gfx_v9_0_ring_emit_gds_switch */
> -		7 + /* gfx_v9_0_ring_emit_hdp_flush */
> -		5 + /* gfx_v9_0_ring_emit_hdp_invalidate */
>  		7 + /* gfx_v9_0_ring_emit_pipeline_sync */
>  		24 + /* gfx_v9_0_ring_emit_vm_flush */
>  		8 + 8 + 8, /* gfx_v9_0_ring_emit_fence_kiq x3 for user fence,
> vm fence */
> --
> 2.7.4
> 
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