[PATCH 12/31] drm/amd/display: Fix 5th display lightup on Vega10
Harry Wentland
harry.wentland at amd.com
Tue May 23 14:08:50 UTC 2017
From: Roman Li <Roman.Li at amd.com>
- fixing bug in calculation of reg offset for D5VGA_CONTROL
Change-Id: I0e08d59d03c8daaaf4848a71fac38c37eba492c5
Signed-off-by: Roman Li <Roman.Li at amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng at amd.com>
Acked-by: Harry Wentland <Harry.Wentland at amd.com>
---
drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
index 245356e72b36..dc8eeac6ac96 100644
--- a/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
+++ b/drivers/gpu/drm/amd/display/dc/dce120/dce120_timing_generator.c
@@ -410,7 +410,7 @@ void dce120_timing_generator_disable_vga(struct timing_generator *tg)
break;
case CONTROLLER_ID_D4:
addr = mmD1VGA_CONTROL;
- offset = mmD1VGA_CONTROL - mmD1VGA_CONTROL;
+ offset = mmD5VGA_CONTROL - mmD1VGA_CONTROL;
break;
case CONTROLLER_ID_D5:
addr = mmD6VGA_CONTROL;
--
2.11.0
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