[PATCH 18/18] drm/amdgpu: fix the gart table cleared issue for S3

[Christian König]

Am 31.05.2017 um 18:29 schrieb Deucher, Alexander:
> > -----Original Message-----
> > From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf
> > Of Huang Rui
> > Sent: Wednesday, May 31, 2017 12:15 PM
> > To: amd-gfx at lists.freedesktop.org; Deucher, Alexander; Koenig, Christian
> > Cc: Wang, Ken; Huang, Ray; Huan, Alvin
> > Subject: [PATCH 18/18] drm/amdgpu: fix the gart table cleared issue 
> for S3
> >
> > Signed-off-by: Huang Rui <ray.huang at amd.com>
> > ---
> >  drivers/gpu/drm/amd/amdgpu/amdgpu.h     | 1 +
> >  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 2 +-
> >  drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c   | 2 ++
> >  drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c   | 2 ++
> >  drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c   | 2 ++
> >  drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c   | 3 +++
> >  6 files changed, 11 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > index 37f9869..50ed985 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> > @@ -624,6 +624,7 @@ struct amdgpu_mc {
> >        uint32_t                srbm_soft_reset;
> >        struct amdgpu_mode_mc_save save;
> >        bool                    prt_warning;
> > +     unsigned long           stollen_size;
>
> Typo: stolen_size
> With that fixed:
> Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

Additional to that this should be an uint64_t otherwise 32bit systems 
will break.

Please also add a "/* TODO: Figure out how to avoid that... */ to 
setting the size to 8MB on Vega10.

With that fixed Reviewed-by: Christian König <christian.koenig at amd.com>.

>
> >        /* apertures */
> >        u64 shared_aperture_start;
> >        u64 shared_aperture_end;
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> > index 29c0deb..0406759 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> > @@ -1381,7 +1381,7 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
> >        /* Change the size here instead of the init above so only lpfn is
> > affected */
> >        amdgpu_ttm_set_active_vram_size(adev, adev-
> > >mc.visible_vram_size);
> >
> > -     r = amdgpu_bo_create(adev, 256 * 1024, PAGE_SIZE, true,
> > +     r = amdgpu_bo_create(adev, adev->mc.stollen_size, PAGE_SIZE,
> > true,
> >                             AMDGPU_GEM_DOMAIN_VRAM,
> > AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED
> > |
> > AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
> > diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> > b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> > index d576edc..540adae 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> > @@ -873,6 +873,8 @@ static int gmc_v6_0_sw_init(void *handle)
> >
> >        adev->mc.mc_mask = 0xffffffffffULL;
> >
> > +     adev->mc.stollen_size = 256 * 1024;
> > +
> >        adev->need_dma32 = false;
> >        dma_bits = adev->need_dma32 ? 32 : 40;
> >        r = pci_set_dma_mask(adev->pdev, DMA_BIT_MASK(dma_bits));
> > diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> > b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> > index 681dda3..92e6e20 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> > @@ -1060,6 +1060,8 @@ static int gmc_v7_0_sw_init(void *handle)
> >         */
> >        adev->mc.mc_mask = 0xffffffffffULL; /* 40 bit MC */
> >
> > +     adev->mc.stollen_size = 256 * 1024;
> > +
> >        /* set DMA mask + need_dma32 flags.
> >         * PCIE - can handle 40-bits.
> >         * IGP - can handle 40-bits
> > diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> > b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> > index b5a3852..7738f4c 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> > @@ -1148,6 +1148,8 @@ static int gmc_v8_0_sw_init(void *handle)
> >         */
> >        adev->mc.mc_mask = 0xffffffffffULL; /* 40 bit MC */
> >
> > +     adev->mc.stollen_size = 256 * 1024;
> > +
> >        /* set DMA mask + need_dma32 flags.
> >         * PCIE - can handle 40-bits.
> >         * IGP - can handle 40-bits
> > diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> > b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> > index fed00f7..31f4f44 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> > @@ -591,6 +591,9 @@ static int gmc_v9_0_sw_init(void *handle)
> >         */
> >        adev->mc.mc_mask = 0xffffffffffffULL; /* 48 bit MC */
> >
> > +     /* it needs to reserve 8M stollen memory for vega10 */
> > +     adev->mc.stollen_size = 8 * 1024 * 1024;
> > +
> >        /* set DMA mask + need_dma32 flags.
> >         * PCIE - can handle 44-bits.
> >         * IGP - can handle 44-bits
> > --
> > 2.7.4
> >
> > _______________________________________________
> > amd-gfx mailing list
> > amd-gfx at lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/amd-gfx


-------------- next part --------------
An HTML attachment was scrubbed...
URL: <https://lists.freedesktop.org/archives/amd-gfx/attachments/20170531/64301efc/attachment-0001.html>