[PATCH umr] Skip ahead if PDE entry is actually a PTE entry. (v2)
Christian König
ckoenig.leichtzumerken at gmail.com
Mon Nov 6 10:01:19 UTC 2017
Am 04.11.2017 um 18:15 schrieb Tom St Denis:
> Signed-off-by: Tom St Denis <tom.stdenis at amd.com>
Still not perfect, but good enough for now. Patch is Tested-by:
Christian König <christian.koenig at amd.com>.
I think you need to rework the VM walking a bit, cause we need to
support the T bit as well in the future and your code make a few
assumptions which doesn't allow that.
Regards,
Christian.
>
> (v2) Don't print out PDE entries with PTE bit set
> ---
> src/lib/read_vram.c | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/src/lib/read_vram.c b/src/lib/read_vram.c
> index 0df48dadec12..51823d71021e 100644
> --- a/src/lib/read_vram.c
> +++ b/src/lib/read_vram.c
> @@ -509,7 +509,7 @@ static int umr_access_vram_ai(struct umr_asic *asic, uint32_t vmid,
> pde_fields.system = (pde_entry >> 1) & 1;
> pde_fields.cache = (pde_entry >> 2) & 1;
> pde_fields.pte = (pde_entry >> 54) & 1;
> - if (memcmp(&pde_fields, &pde_array[pde_cnt], sizeof pde_fields) && asic->options.verbose)
> + if (!pde_fields.pte && memcmp(&pde_fields, &pde_array[pde_cnt], sizeof pde_fields) && asic->options.verbose)
> fprintf(stderr, "[VERBOSE]: %s PDE%d=0x%016llx, VA=0x%012llx, PBA==0x%012llx, V=%d, S=%d, C=%d, P=%d\n",
> &indentation[12-pde_cnt*3],
> pde_cnt,
> @@ -522,6 +522,11 @@ static int umr_access_vram_ai(struct umr_asic *asic, uint32_t vmid,
> (int)pde_fields.pte);
> memcpy(&pde_array[pde_cnt++], &pde_fields, sizeof pde_fields);
>
> + if (pde_fields.pte) {
> + pte_entry = pde_entry;
> + goto pde_is_pte;
> + }
> +
> if (!pde_fields.system)
> pde_fields.pte_base_addr -= vm_fb_offset;
>
> @@ -539,6 +544,7 @@ static int umr_access_vram_ai(struct umr_asic *asic, uint32_t vmid,
> return -1;
>
> // decode PTE values
> +pde_is_pte:
> pte_fields.page_base_addr = pte_entry & 0xFFFFFFFFFF000ULL;
> pte_fields.fragment = (pte_entry >> 7) & 0x1F;
> pte_fields.system = (pte_entry >> 1) & 1;
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