[PATCH 0/8] Cleanup raven1 header files.

[Zhang, Jerry (Junwei)]

On 11/27/2017 07:29 PM, Feifei Xu wrote:
> Remove folder amd/include/asic_reg/raven1 to avoid header files duplication.
> Header files under this folder will be moved to asic_reg/.
>
> Also removed some unused header files of raven1.
>
> Patches are formated with flag --find-renames and --irreversible-delete.
> They are just for reviewing and not meant to be applied with git apply.

Thanks for raven1 clean up.
(About removed files, Raven could share some headers with vega10, I think)

Reviewed-by: Junwei Zhang <Jerry.Zhang at amd.com>

>
> Feifei Xu (8):
>    drm/amd/include:cleanup raven1 sdma header files.
>    drm/amd/include:cleanup raven1 dcn header files.
>    drm/amd/include:cleanup raven1 gc header files.
>    drm/amd/include:cleanup raven1 mmhub header files.
>    drm/amd/include:cleanup raven1 mp header files.
>    drm/amd/include:cleanup raven1 nbio header files.
>    drm/amd/include:cleanup raven1 thm header files.
>    drm/amd/include:cleanup raven1 vcn header files.
>
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c            |     2 +-
>   drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c             |     6 +-
>   drivers/gpu/drm/amd/amdgpu/psp_v10_0.c             |     6 +-
>   drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c             |     2 +-
>   drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c              |     8 +-
>   drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c  |     4 +-
>   .../gpu/drm/amd/display/dc/dcn10/dcn10_resource.c  |    10 +-
>   .../amd/display/dc/gpio/dcn10/hw_factory_dcn10.c   |     4 +-
>   .../amd/display/dc/gpio/dcn10/hw_translate_dcn10.c |     4 +-
>   .../drm/amd/display/dc/i2caux/dcn10/i2caux_dcn10.c |     4 +-
>   .../amd/display/dc/irq/dcn10/irq_service_dcn10.c   |     4 +-
>   .../asic_reg/{raven1/DCN => dcn}/dcn_1_0_offset.h  |     0
>   .../asic_reg/{raven1/DCN => dcn}/dcn_1_0_sh_mask.h |     0
>   .../asic_reg/{raven1/GC => gc}/gc_9_1_offset.h     |     0
>   .../{raven1/MMHUB => mmhub}/mmhub_9_1_offset.h     |     0
>   .../{raven1/MMHUB => mmhub}/mmhub_9_1_sh_mask.h    |     0
>   .../asic_reg/{raven1/MP => mp}/mp_10_0_default.h   |     0
>   .../asic_reg/{raven1/MP => mp}/mp_10_0_offset.h    |     0
>   .../asic_reg/{raven1/MP => mp}/mp_10_0_sh_mask.h   |     0
>   .../{raven1/NBIO => nbio}/nbio_7_0_default.h       |     0
>   .../{raven1/NBIO => nbio}/nbio_7_0_offset.h        |     0
>   .../{raven1/NBIO => nbio}/nbio_7_0_sh_mask.h       |     0
>   .../include/asic_reg/raven1/DCN/dcn_1_0_default.h  |  7988 -----
>   .../include/asic_reg/raven1/GC/gc_9_1_default.h    |  4005 ---
>   .../include/asic_reg/raven1/GC/gc_9_1_sh_mask.h    | 31191 -------------------
>   .../asic_reg/raven1/MMHUB/mmhub_9_1_default.h      |  1028 -
>   .../asic_reg/raven1/SDMA0/sdma0_4_1_sh_mask.h      |  1658 -
>   .../include/asic_reg/raven1/VCN/vcn_1_0_default.h  |   202 -
>   .../{raven1/SDMA0 => sdma0}/sdma0_4_1_default.h    |     0
>   .../{raven1/SDMA0 => sdma0}/sdma0_4_1_offset.h     |     0
>   .../{raven1/THM => thm}/thm_10_0_default.h         |     0
>   .../asic_reg/{raven1/THM => thm}/thm_10_0_offset.h |     0
>   .../{raven1/THM => thm}/thm_10_0_sh_mask.h         |     0
>   .../asic_reg/{raven1/VCN => vcn}/vcn_1_0_offset.h  |     0
>   .../asic_reg/{raven1/VCN => vcn}/vcn_1_0_sh_mask.h |     0
>   drivers/gpu/drm/amd/powerplay/hwmgr/rv_inc.h       |    18 +-
>   36 files changed, 36 insertions(+), 46108 deletions(-)
>   rename drivers/gpu/drm/amd/include/asic_reg/{raven1/DCN => dcn}/dcn_1_0_offset.h (100%)
>   rename drivers/gpu/drm/amd/include/asic_reg/{raven1/DCN => dcn}/dcn_1_0_sh_mask.h (100%)
>   rename drivers/gpu/drm/amd/include/asic_reg/{raven1/GC => gc}/gc_9_1_offset.h (100%)
>   rename drivers/gpu/drm/amd/include/asic_reg/{raven1/MMHUB => mmhub}/mmhub_9_1_offset.h (100%)
>   rename drivers/gpu/drm/amd/include/asic_reg/{raven1/MMHUB => mmhub}/mmhub_9_1_sh_mask.h (100%)
>   rename drivers/gpu/drm/amd/include/asic_reg/{raven1/MP => mp}/mp_10_0_default.h (100%)
>   rename drivers/gpu/drm/amd/include/asic_reg/{raven1/MP => mp}/mp_10_0_offset.h (100%)
>   rename drivers/gpu/drm/amd/include/asic_reg/{raven1/MP => mp}/mp_10_0_sh_mask.h (100%)
>   rename drivers/gpu/drm/amd/include/asic_reg/{raven1/NBIO => nbio}/nbio_7_0_default.h (100%)
>   rename drivers/gpu/drm/amd/include/asic_reg/{raven1/NBIO => nbio}/nbio_7_0_offset.h (100%)
>   rename drivers/gpu/drm/amd/include/asic_reg/{raven1/NBIO => nbio}/nbio_7_0_sh_mask.h (100%)
>   delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/DCN/dcn_1_0_default.h
>   delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/GC/gc_9_1_default.h
>   delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/GC/gc_9_1_sh_mask.h
>   delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/MMHUB/mmhub_9_1_default.h
>   delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/SDMA0/sdma0_4_1_sh_mask.h
>   delete mode 100644 drivers/gpu/drm/amd/include/asic_reg/raven1/VCN/vcn_1_0_default.h
>   rename drivers/gpu/drm/amd/include/asic_reg/{raven1/SDMA0 => sdma0}/sdma0_4_1_default.h (100%)
>   rename drivers/gpu/drm/amd/include/asic_reg/{raven1/SDMA0 => sdma0}/sdma0_4_1_offset.h (100%)
>   rename drivers/gpu/drm/amd/include/asic_reg/{raven1/THM => thm}/thm_10_0_default.h (100%)
>   rename drivers/gpu/drm/amd/include/asic_reg/{raven1/THM => thm}/thm_10_0_offset.h (100%)
>   rename drivers/gpu/drm/amd/include/asic_reg/{raven1/THM => thm}/thm_10_0_sh_mask.h (100%)
>   rename drivers/gpu/drm/amd/include/asic_reg/{raven1/VCN => vcn}/vcn_1_0_offset.h (100%)
>   rename drivers/gpu/drm/amd/include/asic_reg/{raven1/VCN => vcn}/vcn_1_0_sh_mask.h (100%)
>