[PATCH] drm/amdgpu: Set the correct value for PDEs/PTEs of ATC memory on Raven

[Zhao, Yong]

Thanks. Pushed.


Yong

________________________________
From: Christian König <ckoenig.leichtzumerken at gmail.com>
Sent: Friday, October 6, 2017 1:16:36 PM
To: Zhao, Yong; amd-gfx at lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu: Set the correct value for PDEs/PTEs of ATC memory on Raven

Am 06.10.2017 um 17:35 schrieb Yong Zhao:
> From: Yong Zhao <Yong.Zhao at amd.com>
>
> Without the additional bits set in PDEs/PTEs, the ATC memory access
> would have failed on Raven.
>
> Change-Id: I28429ef6d39cdb01dc6f17fea4264ee22d7121d4
> Signed-off-by: Yong Zhao <yong.zhao at amd.com>
> Acked-by: Alex Deucher <alexander.deucher at amd.com>

Nice solution for the define. Patch is Reviewed-by: Christian König
<christian.koenig at amd.com>.

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c |  9 ++++++---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 10 ++++++++++
>   2 files changed, 16 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index bca9eeb..d98d58a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -328,9 +328,10 @@ static int amdgpu_vm_alloc_levels(struct amdgpu_device *adev,
>                                AMDGPU_GEM_CREATE_SHADOW);
>
>        if (vm->pte_support_ats) {
> -             init_value = AMDGPU_PTE_SYSTEM;
> +             init_value = AMDGPU_PTE_DEFAULT_ATC;
>                if (level != adev->vm_manager.num_level - 1)
>                        init_value |= AMDGPU_PDE_PTE;
> +
>        }
>
>        /* walk over the address space and allocate the page tables */
> @@ -2017,7 +2018,7 @@ int amdgpu_vm_clear_freed(struct amdgpu_device *adev,
>                list_del(&mapping->list);
>
>                if (vm->pte_support_ats)
> -                     init_pte_value = AMDGPU_PTE_SYSTEM;
> +                     init_pte_value = AMDGPU_PTE_DEFAULT_ATC;
>
>                r = amdgpu_vm_bo_update_mapping(adev, NULL, NULL, vm,
>                                                mapping->start, mapping->last,
> @@ -2629,7 +2630,9 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm,
>
>                if (adev->asic_type == CHIP_RAVEN) {
>                        vm->pte_support_ats = true;
> -                     init_pde_value = AMDGPU_PTE_SYSTEM | AMDGPU_PDE_PTE;
> +                     init_pde_value = AMDGPU_PTE_DEFAULT_ATC
> +                                     | AMDGPU_PDE_PTE;
> +
>                }
>        } else
>                vm->use_cpu_for_update = !!(adev->vm_manager.vm_update_mode &
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> index 66efbc2..5d0cfc9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> @@ -73,6 +73,16 @@ struct amdgpu_bo_list_entry;
>   #define AMDGPU_PTE_MTYPE(a)    ((uint64_t)a << 57)
>   #define AMDGPU_PTE_MTYPE_MASK       AMDGPU_PTE_MTYPE(3ULL)
>
> +/* For Raven */
> +#define AMDGPU_MTYPE_CC 2
> +
> +#define AMDGPU_PTE_DEFAULT_ATC  (AMDGPU_PTE_SYSTEM      \
> +                                | AMDGPU_PTE_SNOOPED    \
> +                                | AMDGPU_PTE_EXECUTABLE \
> +                                | AMDGPU_PTE_READABLE   \
> +                                | AMDGPU_PTE_WRITEABLE  \
> +                                | AMDGPU_PTE_MTYPE(AMDGPU_MTYPE_CC))
> +
>   /* How to programm VM fault handling */
>   #define AMDGPU_VM_FAULT_STOP_NEVER  0
>   #define AMDGPU_VM_FAULT_STOP_FIRST  1


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