[PATCH 4/9] drm/amd/powerplay: implement function notify_cac_buffer_info on VI

Alex Deucher alexdeucher at gmail.com
Mon Oct 9 19:57:59 UTC 2017


On Mon, Oct 9, 2017 at 12:42 AM, Rex Zhu <Rex.Zhu at amd.com> wrote:
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c     | 28 +++++++++++++++
>  drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c   | 42 ++++++++++++++++++++++
>  drivers/gpu/drm/amd/powerplay/inc/smumgr.h         |  5 +++
>  drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c      | 10 ++++++
>  drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c    | 10 ++++++
>  drivers/gpu/drm/amd/powerplay/smumgr/iceland_smc.c | 10 ++++++
>  .../gpu/drm/amd/powerplay/smumgr/polaris10_smc.c   | 10 ++++++
>  drivers/gpu/drm/amd/powerplay/smumgr/tonga_smc.c   | 10 ++++++
>  8 files changed, 125 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
> index 189f3b5..a91b58d 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c
> @@ -1871,6 +1871,33 @@ static int cz_read_sensor(struct pp_hwmgr *hwmgr, int idx,
>         }
>  }
>
> +static int cz_notify_cac_buffer_info(struct pp_hwmgr *hwmgr,
> +                                       uint32_t virtual_addr_low,
> +                                       uint32_t virtual_addr_hi,
> +                                       uint32_t mc_addr_low,
> +                                       uint32_t mc_addr_hi,
> +                                       uint32_t size)
> +{
> +       smum_send_msg_to_smc_with_parameter(hwmgr,
> +                                       PPSMC_MSG_DramAddrHiVirtual,
> +                                       mc_addr_hi);
> +       smum_send_msg_to_smc_with_parameter(hwmgr,
> +                                       PPSMC_MSG_DramAddrLoVirtual,
> +                                       mc_addr_low);
> +       smum_send_msg_to_smc_with_parameter(hwmgr,
> +                                       PPSMC_MSG_DramAddrHiPhysical,
> +                                       virtual_addr_hi);
> +       smum_send_msg_to_smc_with_parameter(hwmgr,
> +                                       PPSMC_MSG_DramAddrLoPhysical,
> +                                       virtual_addr_low);
> +
> +       smum_send_msg_to_smc_with_parameter(hwmgr,
> +                                       PPSMC_MSG_DramBufferSize,
> +                                       size);
> +       return 0;
> +}
> +
> +
>  static const struct pp_hwmgr_func cz_hwmgr_funcs = {
>         .backend_init = cz_hwmgr_backend_init,
>         .backend_fini = cz_hwmgr_backend_fini,
> @@ -1900,6 +1927,7 @@ static int cz_read_sensor(struct pp_hwmgr *hwmgr, int idx,
>         .dynamic_state_management_enable = cz_enable_dpm_tasks,
>         .power_state_set = cz_set_power_state_tasks,
>         .dynamic_state_management_disable = cz_disable_dpm_tasks,
> +       .notify_cac_buffer_info = cz_notify_cac_buffer_info,
>  };
>
>  int cz_init_function_pointers(struct pp_hwmgr *hwmgr)
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> index 4826b29..e32f18a 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> @@ -4645,6 +4645,47 @@ static int smu7_avfs_control(struct pp_hwmgr *hwmgr, bool enable)
>         return 0;
>  }
>
> +static int smu7_notify_cac_buffer_info(struct pp_hwmgr *hwmgr,
> +                                       uint32_t virtual_addr_low,
> +                                       uint32_t virtual_addr_hi,
> +                                       uint32_t mc_addr_low,
> +                                       uint32_t mc_addr_hi,
> +                                       uint32_t size)
> +{
> +       struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
> +
> +       cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
> +                                       data->soft_regs_start +
> +                                       smum_get_offsetof(hwmgr,
> +                                       SMU_SoftRegisters, DRAM_LOG_ADDR_H),
> +                                       mc_addr_hi);
> +
> +       cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
> +                                       data->soft_regs_start +
> +                                       smum_get_offsetof(hwmgr,
> +                                       SMU_SoftRegisters, DRAM_LOG_ADDR_L),
> +                                       mc_addr_low);
> +
> +       cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
> +                                       data->soft_regs_start +
> +                                       smum_get_offsetof(hwmgr,
> +                                       SMU_SoftRegisters, DRAM_LOG_PHY_ADDR_H),
> +                                       virtual_addr_hi);
> +
> +       cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
> +                                       data->soft_regs_start +
> +                                       smum_get_offsetof(hwmgr,
> +                                       SMU_SoftRegisters, DRAM_LOG_PHY_ADDR_L),
> +                                       virtual_addr_low);
> +
> +       cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
> +                                       data->soft_regs_start +
> +                                       smum_get_offsetof(hwmgr,
> +                                       SMU_SoftRegisters, DRAM_LOG_BUFF_SIZE),
> +                                       size);
> +       return 0;
> +}
> +
>  static const struct pp_hwmgr_func smu7_hwmgr_funcs = {
>         .backend_init = &smu7_hwmgr_backend_init,
>         .backend_fini = &smu7_hwmgr_backend_fini,
> @@ -4696,6 +4737,7 @@ static int smu7_avfs_control(struct pp_hwmgr *hwmgr, bool enable)
>         .avfs_control = smu7_avfs_control,
>         .disable_smc_firmware_ctf = smu7_thermal_disable_alert,
>         .start_thermal_controller = smu7_start_thermal_controller,
> +       .notify_cac_buffer_info = smu7_notify_cac_buffer_info,
>  };
>
>  uint8_t smu7_get_sleep_divider_id_from_clock(uint32_t clock,
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/smumgr.h b/drivers/gpu/drm/amd/powerplay/inc/smumgr.h
> index 7c9aba8..b1b27b2 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/smumgr.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/smumgr.h
> @@ -75,6 +75,11 @@ enum SMU_MEMBER {
>         VceBootLevel,
>         SamuBootLevel,
>         LowSclkInterruptThreshold,
> +       DRAM_LOG_ADDR_H,
> +       DRAM_LOG_ADDR_L,
> +       DRAM_LOG_PHY_ADDR_H,
> +       DRAM_LOG_PHY_ADDR_L,
> +       DRAM_LOG_BUFF_SIZE,
>  };
>
>
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c b/drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c
> index 0017b9e..4d672cd 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c
> @@ -2266,6 +2266,16 @@ static uint32_t ci_get_offsetof(uint32_t type, uint32_t member)
>                         return offsetof(SMU7_SoftRegisters, PreVBlankGap);
>                 case VBlankTimeout:
>                         return offsetof(SMU7_SoftRegisters, VBlankTimeout);
> +               case DRAM_LOG_ADDR_H:
> +                       return offsetof(SMU7_SoftRegisters, DRAM_LOG_ADDR_H);
> +               case DRAM_LOG_ADDR_L:
> +                       return offsetof(SMU7_SoftRegisters, DRAM_LOG_ADDR_L);
> +               case DRAM_LOG_PHY_ADDR_H:
> +                       return offsetof(SMU7_SoftRegisters, DRAM_LOG_PHY_ADDR_H);
> +               case DRAM_LOG_PHY_ADDR_L:
> +                       return offsetof(SMU7_SoftRegisters, DRAM_LOG_PHY_ADDR_L);
> +               case DRAM_LOG_BUFF_SIZE:
> +                       return offsetof(SMU7_SoftRegisters, DRAM_LOG_BUFF_SIZE);
>                 }
>         case SMU_Discrete_DpmTable:
>                 switch (member) {
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c
> index b1a66b5..e130b77 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c
> @@ -2199,6 +2199,16 @@ uint32_t fiji_get_offsetof(uint32_t type, uint32_t member)
>                         return offsetof(SMU73_SoftRegisters, VBlankTimeout);
>                 case UcodeLoadStatus:
>                         return offsetof(SMU73_SoftRegisters, UcodeLoadStatus);
> +               case DRAM_LOG_ADDR_H:
> +                       return offsetof(SMU73_SoftRegisters, DRAM_LOG_ADDR_H);
> +               case DRAM_LOG_ADDR_L:
> +                       return offsetof(SMU73_SoftRegisters, DRAM_LOG_ADDR_L);
> +               case DRAM_LOG_PHY_ADDR_H:
> +                       return offsetof(SMU73_SoftRegisters, DRAM_LOG_PHY_ADDR_H);
> +               case DRAM_LOG_PHY_ADDR_L:
> +                       return offsetof(SMU73_SoftRegisters, DRAM_LOG_PHY_ADDR_L);
> +               case DRAM_LOG_BUFF_SIZE:
> +                       return offsetof(SMU73_SoftRegisters, DRAM_LOG_BUFF_SIZE);
>                 }
>         case SMU_Discrete_DpmTable:
>                 switch (member) {
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smc.c b/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smc.c
> index efb0fc0..da0c93b 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smc.c
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smc.c
> @@ -2125,6 +2125,16 @@ uint32_t iceland_get_offsetof(uint32_t type, uint32_t member)
>                         return offsetof(SMU71_SoftRegisters, VBlankTimeout);
>                 case UcodeLoadStatus:
>                         return offsetof(SMU71_SoftRegisters, UcodeLoadStatus);
> +               case DRAM_LOG_ADDR_H:
> +                       return offsetof(SMU71_SoftRegisters, DRAM_LOG_ADDR_H);
> +               case DRAM_LOG_ADDR_L:
> +                       return offsetof(SMU71_SoftRegisters, DRAM_LOG_ADDR_L);
> +               case DRAM_LOG_PHY_ADDR_H:
> +                       return offsetof(SMU71_SoftRegisters, DRAM_LOG_PHY_ADDR_H);
> +               case DRAM_LOG_PHY_ADDR_L:
> +                       return offsetof(SMU71_SoftRegisters, DRAM_LOG_PHY_ADDR_L);
> +               case DRAM_LOG_BUFF_SIZE:
> +                       return offsetof(SMU71_SoftRegisters, DRAM_LOG_BUFF_SIZE);
>                 }
>         case SMU_Discrete_DpmTable:
>                 switch (member) {
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smc.c b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smc.c
> index c92ea38..113cadb 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smc.c
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smc.c
> @@ -2190,6 +2190,16 @@ uint32_t polaris10_get_offsetof(uint32_t type, uint32_t member)
>                         return offsetof(SMU74_SoftRegisters, VBlankTimeout);
>                 case UcodeLoadStatus:
>                         return offsetof(SMU74_SoftRegisters, UcodeLoadStatus);
> +               case DRAM_LOG_ADDR_H:
> +                       return offsetof(SMU74_SoftRegisters, DRAM_LOG_ADDR_H);
> +               case DRAM_LOG_ADDR_L:
> +                       return offsetof(SMU74_SoftRegisters, DRAM_LOG_ADDR_L);
> +               case DRAM_LOG_PHY_ADDR_H:
> +                       return offsetof(SMU74_SoftRegisters, DRAM_LOG_PHY_ADDR_H);
> +               case DRAM_LOG_PHY_ADDR_L:
> +                       return offsetof(SMU74_SoftRegisters, DRAM_LOG_PHY_ADDR_L);
> +               case DRAM_LOG_BUFF_SIZE:
> +                       return offsetof(SMU74_SoftRegisters, DRAM_LOG_BUFF_SIZE);
>                 }
>         case SMU_Discrete_DpmTable:
>                 switch (member) {
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smc.c b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smc.c
> index 1f720cc..6675a85 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smc.c
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smc.c
> @@ -2668,6 +2668,16 @@ uint32_t tonga_get_offsetof(uint32_t type, uint32_t member)
>                         return offsetof(SMU72_SoftRegisters, VBlankTimeout);
>                 case UcodeLoadStatus:
>                         return offsetof(SMU72_SoftRegisters, UcodeLoadStatus);
> +               case DRAM_LOG_ADDR_H:
> +                       return offsetof(SMU72_SoftRegisters, DRAM_LOG_ADDR_H);
> +               case DRAM_LOG_ADDR_L:
> +                       return offsetof(SMU72_SoftRegisters, DRAM_LOG_ADDR_L);
> +               case DRAM_LOG_PHY_ADDR_H:
> +                       return offsetof(SMU72_SoftRegisters, DRAM_LOG_PHY_ADDR_H);
> +               case DRAM_LOG_PHY_ADDR_L:
> +                       return offsetof(SMU72_SoftRegisters, DRAM_LOG_PHY_ADDR_L);
> +               case DRAM_LOG_BUFF_SIZE:
> +                       return offsetof(SMU72_SoftRegisters, DRAM_LOG_BUFF_SIZE);
>                 }
>         case SMU_Discrete_DpmTable:
>                 switch (member) {
> --
> 1.9.1
>
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