[PATCH 8/9] drm/amdgpu: allocate requested gtt buffer for smu
Alex Deucher
alexdeucher at gmail.com
Mon Oct 9 20:06:16 UTC 2017
On Mon, Oct 9, 2017 at 12:42 AM, Rex Zhu <Rex.Zhu at amd.com> wrote:
> v2: simplify check smu_memory_size code.
> simplify allocate smu memroy code.
See my comment in patch 7. More comments below.
>
> Change-Id: I8eb4f542dc2351c6393e4723f4985df92ff527cd
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 79 ++++++++++++++++++++++++++++++
> drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 3 ++
> drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 2 +
> drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 3 ++
> drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 2 +
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 +
> 7 files changed, 93 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 3a79d41..534b313 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1615,6 +1615,8 @@ struct amdgpu_device {
> bool has_hw_reset;
> u8 reset_magic[AMDGPU_RESET_MAGIC_NUM];
>
> + struct amdgpu_bo *smu_prv_buffer;
> +
> /* record last mm index being written through WREG32*/
> unsigned long last_mm_index;
> bool in_sriov_reset;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 24f6e3c..9311096 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -1077,6 +1077,46 @@ static void amdgpu_check_vm_size(struct amdgpu_device *adev)
> amdgpu_vm_size = -1;
> }
>
> +static void amdgpu_check_smu_prv_buffer_size(struct amdgpu_device *adev)
For consistency, please prefix this function with amdgpu_device. E.g.,
amdgpu_device_check_smu_prv_buffer_size()
> +{
> + struct sysinfo si;
> + bool is_os_64 = (sizeof(void *) == 8) ? true : false;
> + uint64_t total_memory;
> + uint64_t dram_size_seven_GB = 0x1B8000000;
> + uint64_t dram_size_three_GB = 0xB8000000;
> +
> + if (amdgpu_smu_memory_pool_size == 0)
> + return;
> +
> + if (!is_os_64) {
> + DRM_WARN("Not 64-bit OS, feature not supported\n");
> + goto def_value;
> + }
> + si_meminfo(&si);
> + total_memory = (uint64_t)si.totalram * si.mem_unit;
> +
> + if ((amdgpu_smu_memory_pool_size == 1) ||
> + (amdgpu_smu_memory_pool_size == 2)) {
> + if (total_memory < dram_size_three_GB)
> + goto def_value1;
> + } else if ((amdgpu_smu_memory_pool_size == 4) ||
> + (amdgpu_smu_memory_pool_size == 8)) {
> + if (total_memory < dram_size_seven_GB)
> + goto def_value1;
> + } else {
> + DRM_WARN("Smu memory pool size not supported\n");
> + goto def_value;
> + }
> + amdgpu_smu_memory_pool_size = amdgpu_smu_memory_pool_size << 28;
> +
> + return;
> +
> +def_value1:
> + DRM_WARN("No enough system memory\n");
> +def_value:
> + amdgpu_smu_memory_pool_size = 0;
> +}
> +
> /**
> * amdgpu_check_arguments - validate module params
> *
> @@ -1118,6 +1158,8 @@ static void amdgpu_check_arguments(struct amdgpu_device *adev)
> amdgpu_vm_fragment_size = -1;
> }
>
> + amdgpu_check_smu_prv_buffer_size(adev);
> +
> amdgpu_check_vm_size(adev);
>
> amdgpu_check_block_size(adev);
> @@ -2027,6 +2069,36 @@ bool amdgpu_device_has_dc_support(struct amdgpu_device *adev)
> return amdgpu_device_asic_has_dc_support(adev->asic_type);
> }
>
> +static void amdgpu_alloc_mem_for_smu(struct amdgpu_device *adev)
amdgpu_device_alloc_mem_for_smu
> +{
> + int r = -EINVAL;
> + void *cpu_ptr = NULL;
> + uint64_t gpu_addr;
> +
> + if (amdgpu_bo_create_kernel(adev, amdgpu_smu_memory_pool_size,
> + PAGE_SIZE, AMDGPU_GEM_DOMAIN_GTT,
> + &adev->smu_prv_buffer,
> + &gpu_addr,
> + &cpu_ptr)) {
> + DRM_ERROR("amdgpu: failed to create smu prv buffer (%d).\n", r);
> + return;
> + }
> +
> + if (adev->powerplay.pp_funcs->notify_smu_memory_info)
> + r = amdgpu_dpm_notify_smu_memory_info(adev,
> + lower_32_bits((unsigned long)cpu_ptr),
> + upper_32_bits((unsigned long)cpu_ptr),
> + lower_32_bits(gpu_addr),
> + upper_32_bits(gpu_addr),
> + amdgpu_smu_memory_pool_size);
> +
> + if (r) {
> + amdgpu_bo_free_kernel(&adev->smu_prv_buffer, NULL, NULL);
> + adev->smu_prv_buffer = NULL;
> + DRM_ERROR("amdgpu: failed to notify SMU buffer address.\n");
> + }
> +}
> +
> /**
> * amdgpu_device_init - initialize the driver
> *
> @@ -2307,6 +2379,9 @@ int amdgpu_device_init(struct amdgpu_device *adev,
> DRM_INFO("amdgpu: acceleration disabled, skipping benchmarks\n");
> }
>
> + if (amdgpu_smu_memory_pool_size)
> + amdgpu_alloc_mem_for_smu(adev);
> +
> /* enable clockgating, etc. after ib tests, etc. since some blocks require
> * explicit gating rather than handling it automatically.
> */
> @@ -2352,6 +2427,10 @@ void amdgpu_device_fini(struct amdgpu_device *adev)
> release_firmware(adev->firmware.gpu_info_fw);
> adev->firmware.gpu_info_fw = NULL;
> }
> + if (adev->smu_prv_buffer) {
> + amdgpu_bo_free_kernel(&adev->smu_prv_buffer, NULL, NULL);
> + adev->smu_prv_buffer = NULL;
> + }
> adev->accel_working = false;
> cancel_delayed_work_sync(&adev->late_init_work);
> /* free i2c buses */
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 1086f03..75e10b6 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -1270,6 +1270,9 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
> adev->mc.mc_vram_size);
> else
> gtt_size = (uint64_t)amdgpu_gtt_size << 20;
> +
> + gtt_size = gtt_size + amdgpu_smu_memory_pool_size;
> +
> r = ttm_bo_init_mm(&adev->mman.bdev, TTM_PL_TT, gtt_size >> PAGE_SHIFT);
> if (r) {
> DRM_ERROR("Failed initializing GTT heap.\n");
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> index f4603a7..e1f97b1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> @@ -350,6 +350,8 @@ static int gmc_v6_0_mc_init(struct amdgpu_device *adev)
> adev->mc.gart_size = (u64)amdgpu_gart_size << 20;
> }
>
> + adev->mc.gart_size += amdgpu_smu_memory_pool_size;
> +
> gmc_v6_0_vram_gtt_location(adev, &adev->mc);
>
> return 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> index b0528ca..ac481a0 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> @@ -407,6 +407,9 @@ static int gmc_v7_0_mc_init(struct amdgpu_device *adev)
> adev->mc.gart_size = (u64)amdgpu_gart_size << 20;
> }
>
> +
> + adev->mc.gart_size += amdgpu_smu_memory_pool_size;
> +
> gmc_v7_0_vram_gtt_location(adev, &adev->mc);
>
> return 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> index f368cfe..0f5bccc 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> @@ -582,6 +582,8 @@ static int gmc_v8_0_mc_init(struct amdgpu_device *adev)
> adev->mc.gart_size = (u64)amdgpu_gart_size << 20;
> }
>
> + adev->mc.gart_size += amdgpu_smu_memory_pool_size;
> +
> gmc_v8_0_vram_gtt_location(adev, &adev->mc);
>
> return 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index 6216993..09cf381 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -511,6 +511,8 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
> adev->mc.gart_size = (u64)amdgpu_gart_size << 20;
> }
>
> + adev->mc.gart_size += amdgpu_smu_memory_pool_size;
> +
> gmc_v9_0_vram_gtt_location(adev, &adev->mc);
>
> return 0;
> --
> 1.9.1
>
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