[PATCH 3/3] drm/amd/powerplay: add new sysfs pp_alloc_mem_for_smu

[Rex Zhu]

Change-Id: I3f689b8da288ba739aaf74340c056814f80713a9
Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h        |  2 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  6 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c     | 89 ++++++++++++++++++++++++++++++
 3 files changed, 96 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 43fbcfe..7139d3b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1637,6 +1637,8 @@ struct amdgpu_device {
 	bool has_hw_reset;
 	u8				reset_magic[AMDGPU_RESET_MAGIC_NUM];
 
+	struct amdgpu_bo		*smu_prv_buffer;
+
 	/* record last mm index being written through WREG32*/
 	unsigned long last_mm_index;
 	bool                            in_sriov_reset;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 548f4dc..6f07a55 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2426,6 +2426,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
 			DRM_INFO("amdgpu: acceleration disabled, skipping benchmarks\n");
 	}
 
+
 	/* enable clockgating, etc. after ib tests, etc. since some blocks require
 	 * explicit gating rather than handling it automatically.
 	 */
@@ -2472,7 +2473,10 @@ void amdgpu_device_fini(struct amdgpu_device *adev)
 		release_firmware(adev->firmware.gpu_info_fw);
 		adev->firmware.gpu_info_fw = NULL;
 	}
-
+	if (adev->smu_prv_buffer) {
+		amdgpu_bo_free_kernel(&adev->smu_prv_buffer, NULL, NULL);
+		adev->smu_prv_buffer = NULL;
+	}
 	adev->accel_working = false;
 	cancel_delayed_work_sync(&adev->late_init_work);
 	/* free i2c buses */
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index f3afa66..1c1aceb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -737,6 +737,84 @@ static ssize_t amdgpu_set_pp_compute_power_profile(struct device *dev,
 	return amdgpu_set_pp_power_profile(dev, buf, count, &request);
 }
 
+static ssize_t amdgpu_get_pp_alloc_mem_for_smu(struct device *dev,
+		struct device_attribute *attr,
+		char *buf)
+{
+	if (amdgpu_smu_memory_pool_size == 0)
+		return snprintf(buf, PAGE_SIZE, "Feature not enabled\n");
+	else
+		return snprintf(buf, PAGE_SIZE, "Max support: %d * 256Mb\n",
+					amdgpu_smu_memory_pool_size >> 28);
+}
+
+static int amdgpu_alloc_mem_for_smu(struct amdgpu_device *adev, uint32_t size)
+{
+	int r = -EINVAL;
+	void *cpu_ptr = NULL;
+	uint64_t gpu_addr;
+
+	if (amdgpu_bo_create_kernel(adev, size,
+				       PAGE_SIZE, AMDGPU_GEM_DOMAIN_GTT,
+				       &adev->smu_prv_buffer,
+				       &gpu_addr,
+				       &cpu_ptr)) {
+		DRM_ERROR("amdgpu: failed to create smu prv buffer\n");
+		return r;
+	}
+
+	if (adev->powerplay.pp_funcs->notify_smu_memory_info)
+		r = amdgpu_dpm_notify_smu_memory_info(adev,
+					lower_32_bits((unsigned long)cpu_ptr),
+					upper_32_bits((unsigned long)cpu_ptr),
+					lower_32_bits(gpu_addr),
+					upper_32_bits(gpu_addr),
+					size);
+
+	if (r) {
+		amdgpu_bo_free_kernel(&adev->smu_prv_buffer, NULL, NULL);
+		adev->smu_prv_buffer = NULL;
+		DRM_ERROR("amdgpu: failed to notify SMU buffer address.\n");
+	}
+
+	return r;
+}
+
+static ssize_t amdgpu_set_pp_alloc_mem_for_smu(struct device *dev,
+		struct device_attribute *attr,
+		const char *buf,
+		size_t count)
+{
+	struct drm_device *ddev = dev_get_drvdata(dev);
+	struct amdgpu_device *adev = ddev->dev_private;
+	u32 size;
+	int err;
+
+	err = kstrtou32(buf, 10, &size);
+	if (err)
+		return err;
+
+	if (size == 0) {
+		if (adev->smu_prv_buffer) {
+			amdgpu_bo_free_kernel(&adev->smu_prv_buffer, NULL, NULL);
+			adev->smu_prv_buffer = NULL;
+			return count;
+		}
+		return -EINVAL;
+	}
+
+	size <<= 28;
+	if (size > amdgpu_smu_memory_pool_size) {
+		pr_info("Smu memory pool size not supported\n");
+		return -EINVAL;
+	}
+
+	if (amdgpu_alloc_mem_for_smu(adev, size))
+		count = -EINVAL;
+
+	return count;
+}
+
 static DEVICE_ATTR(power_dpm_state, S_IRUGO | S_IWUSR, amdgpu_get_dpm_state, amdgpu_set_dpm_state);
 static DEVICE_ATTR(power_dpm_force_performance_level, S_IRUGO | S_IWUSR,
 		   amdgpu_get_dpm_forced_performance_level,
@@ -770,6 +848,10 @@ static DEVICE_ATTR(pp_gfx_power_profile, S_IRUGO | S_IWUSR,
 static DEVICE_ATTR(pp_compute_power_profile, S_IRUGO | S_IWUSR,
 		amdgpu_get_pp_compute_power_profile,
 		amdgpu_set_pp_compute_power_profile);
+static DEVICE_ATTR(pp_alloc_mem_for_smu, S_IRUGO | S_IWUSR,
+		amdgpu_get_pp_alloc_mem_for_smu,
+		amdgpu_set_pp_alloc_mem_for_smu);
+
 
 static ssize_t amdgpu_hwmon_show_temp(struct device *dev,
 				      struct device_attribute *attr,
@@ -1398,6 +1480,13 @@ int amdgpu_pm_sysfs_init(struct amdgpu_device *adev)
 		return ret;
 	}
 
+	ret = device_create_file(adev->dev,
+			&dev_attr_pp_alloc_mem_for_smu);
+	if (ret) {
+		DRM_ERROR("failed to create device file	pp_alloc_mem_for_smu\n");
+		return ret;
+	}
+
 	ret = amdgpu_debugfs_pm_init(adev);
 	if (ret) {
 		DRM_ERROR("Failed to register debugfs file for dpm!\n");
-- 
1.9.1