[PATCH 004/103] drm/amd/display: Add FBC on/off to front-end programming
Harry Wentland
harry.wentland at amd.com
Tue Oct 10 22:39:33 UTC 2017
From: Roman Li <Roman.Li at amd.com>
- Fixing text mode for cases when VT-switch doesn't result
in timing change
Signed-off-by: Roman Li <Roman.Li at amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland at amd.com>
---
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index b3448a41718e..590b2ad37105 100644
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -2554,6 +2554,15 @@ static void dce110_program_front_end_for_pipe(
program_scaler(dc, pipe_ctx);
+#ifdef ENABLE_FBC
+ if (dc->fbc_compressor && old_pipe->stream) {
+ if (plane_state->tiling_info.gfx8.array_mode == DC_ARRAY_LINEAR_GENERAL)
+ dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor);
+ else
+ enable_fbc(dc, dc->current_state);
+ }
+#endif
+
mi->funcs->mem_input_program_surface_config(
mi,
plane_state->format,
--
2.14.1
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