[PATCH 090/103] drm/amd/display: Fix underscan not using proper scaling

[Harry Wentland]

From: Bhawanpreet Lakha <Bhawanpreet.Lakha at amd.com>

fix underscan not being set correctly

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha at amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland at amd.com>
---
 drivers/gpu/drm/amd/display/dc/core/dc.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 4df5bf750257..12aeb6d83f42 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1362,7 +1362,7 @@ void dc_commit_updates_for_stream(struct dc *dc,
 	enum surface_update_type update_type;
 	struct dc_state *context;
 	struct dc_context *dc_ctx = dc->ctx;
-	int i;
+	int i, j;
 
 	stream_status = dc_stream_get_status(stream);
 	context = dc->current_state;
@@ -1396,8 +1396,17 @@ void dc_commit_updates_for_stream(struct dc *dc,
 		if (srf_updates[i].flip_addr)
 			surface->address = srf_updates[i].flip_addr->address;
 
-	}
+		if (update_type >= UPDATE_TYPE_MED) {
+			for (j = 0; j < dc->res_pool->pipe_count; j++) {
+				struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j];
+
+				if (pipe_ctx->plane_state != surface)
+					continue;
 
+				resource_build_scaling_params(pipe_ctx);
+			}
+		}
+	}
 
 	commit_planes_for_stream(
 				dc,
-- 
2.14.1