[PATCH 6/7] drm/amdgpu/virt: implement wait_reset callbacks for vi/ai

[Ding, Pixel]

Thanks:) I only got the ack for part 1…
— 
Sincerely Yours,
Pixel







On 26/10/2017, 10:29 AM, "Deucher, Alexander" <Alexander.Deucher at amd.com> wrote:

>> -----Original Message-----
>> From: Ding, Pixel
>> Sent: Wednesday, October 25, 2017 10:20 PM
>> To: amd-gfx at lists.freedesktop.org; Deucher, Alexander
>> Cc: Sun, Gary
>> Subject: Re: [PATCH 6/7] drm/amdgpu/virt: implement wait_reset callbacks
>> for vi/ai
>> 
>> Hi Alex,
>> 
>> Any concern about this patch? it’s split as suggested.
>
>I replied with my ack.  Did the email not go through?
>
>Alex
>
>> —
>> Sincerely Yours,
>> Pixel
>> 
>> 
>> 
>> 
>> 
>> 
>> 
>> On 25/10/2017, 10:17 AM, "Pixel Ding" <Pixel.Ding at amd.com> wrote:
>> 
>> >From: pding <Pixel.Ding at amd.com>
>> >
>> >Hi Alex,
>> >
>> >Split the wait_reset patch to 2. Part 2.
>> >
>> >please review.
>> >
>> >---
>> >
>> >Signed-off-by: pding <Pixel.Ding at amd.com>
>> >---
>> > drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c | 1 +
>> > drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c | 6 ++++++
>> > 2 files changed, 7 insertions(+)
>> >
>> >diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
>> b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
>> >index b4906d2..f91aab3 100644
>> >--- a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
>> >+++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
>> >@@ -353,5 +353,6 @@ const struct amdgpu_virt_ops xgpu_ai_virt_ops = {
>> > 	.req_full_gpu	= xgpu_ai_request_full_gpu_access,
>> > 	.rel_full_gpu	= xgpu_ai_release_full_gpu_access,
>> > 	.reset_gpu = xgpu_ai_request_reset,
>> >+	.wait_reset = NULL,
>> > 	.trans_msg = xgpu_ai_mailbox_trans_msg,
>> > };
>> >diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c
>> b/drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c
>> >index c25a831..27b03c7 100644
>> >--- a/drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c
>> >+++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c
>> >@@ -458,6 +458,11 @@ static int xgpu_vi_request_reset(struct
>> amdgpu_device *adev)
>> > 	return xgpu_vi_send_access_requests(adev,
>> IDH_REQ_GPU_RESET_ACCESS);
>> > }
>> >
>> >+static int xgpu_vi_wait_reset_cmpl(struct amdgpu_device *adev)
>> >+{
>> >+	return xgpu_vi_poll_msg(adev, IDH_FLR_NOTIFICATION_CMPL);
>> >+}
>> >+
>> > static int xgpu_vi_request_full_gpu_access(struct amdgpu_device *adev,
>> > 					   bool init)
>> > {
>> >@@ -613,5 +618,6 @@ const struct amdgpu_virt_ops xgpu_vi_virt_ops = {
>> > 	.req_full_gpu		= xgpu_vi_request_full_gpu_access,
>> > 	.rel_full_gpu		= xgpu_vi_release_full_gpu_access,
>> > 	.reset_gpu		= xgpu_vi_request_reset,
>> >+	.wait_reset             = xgpu_vi_wait_reset_cmpl,
>> > 	.trans_msg		= NULL, /* Does not need to trans VF errors
>> to host. */
>> > };
>> >--
>> >2.9.5
>> >