[PATCH 09/29] drm/amd/display: Not reset front end when program back end.
Harry Wentland
harry.wentland at amd.com
Thu Oct 26 18:35:05 UTC 2017
From: Yongqiang Sun <yongqiang.sun at amd.com>
Since front end is programmed before back end programming,
no need to reset front end in back end programming.
Signed-off-by: Yongqiang Sun <yongqiang.sun at amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng at amd.com>
Acked-by: Harry Wentland <harry.wentland at amd.com>
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 3 +-
.../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 76 ----------------------
2 files changed, 2 insertions(+), 77 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 748490633932..63dd2caa7576 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -809,6 +809,8 @@ static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *c
if (!dcb->funcs->is_accelerated_mode(dcb))
dc->hwss.enable_accelerated_mode(dc);
+
+
for (i = 0; i < context->stream_count; i++) {
const struct dc_sink *sink = context->streams[i]->sink;
@@ -889,7 +891,6 @@ bool dc_commit_state(struct dc *dc, struct dc_state *context)
return (result == DC_OK);
}
-
bool dc_post_update_surfaces_to_stream(struct dc *dc)
{
int i;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 4fc2bc4b3dc4..77ba1bfbef25 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -617,32 +617,6 @@ static void plane_atomic_disable(struct dc *dc,
verify_allow_pstate_change_high(dc->hwseq);
}
-/*
- * kill power to plane hw
- * note: cannot power down until plane is disable
- */
-static void plane_atomic_power_down(struct dc *dc, int fe_idx)
-{
- struct dce_hwseq *hws = dc->hwseq;
- struct dpp *dpp = dc->res_pool->dpps[fe_idx];
-
- if (REG(DC_IP_REQUEST_CNTL)) {
- REG_SET(DC_IP_REQUEST_CNTL, 0,
- IP_REQUEST_EN, 1);
- dpp_pg_control(hws, fe_idx, false);
- hubp_pg_control(hws, fe_idx, false);
- dpp->funcs->dpp_reset(dpp);
- REG_SET(DC_IP_REQUEST_CNTL, 0,
- IP_REQUEST_EN, 0);
- dm_logger_write(dc->ctx->logger, LOG_DEBUG,
- "Power gated front end %d\n", fe_idx);
-
- if (dc->debug.sanity_checks)
- verify_allow_pstate_change_high(dc->hwseq);
- }
-}
-
-
static void reset_front_end(
struct dc *dc,
int fe_idx)
@@ -792,56 +766,6 @@ static void reset_hw_ctx_wrap(
{
int i;
- /* Reset Front End*/
- /* Lock*/
- for (i = 0; i < dc->res_pool->pipe_count; i++) {
- struct pipe_ctx *cur_pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i];
- struct timing_generator *tg = cur_pipe_ctx->stream_res.tg;
-
- if (cur_pipe_ctx->stream)
- tg->funcs->lock(tg);
- }
- /* Disconnect*/
- for (i = dc->res_pool->pipe_count - 1; i >= 0 ; i--) {
- struct pipe_ctx *pipe_ctx_old =
- &dc->current_state->res_ctx.pipe_ctx[i];
- struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
-
- if (!pipe_ctx->stream ||
- !pipe_ctx->plane_state ||
- pipe_need_reprogram(pipe_ctx_old, pipe_ctx)) {
-
- plane_atomic_disconnect(dc, i);
- }
- }
- /* Unlock*/
- for (i = dc->res_pool->pipe_count - 1; i >= 0; i--) {
- struct pipe_ctx *cur_pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i];
- struct timing_generator *tg = cur_pipe_ctx->stream_res.tg;
-
- if (cur_pipe_ctx->stream)
- tg->funcs->unlock(tg);
- }
-
- /* Disable and Powerdown*/
- for (i = dc->res_pool->pipe_count - 1; i >= 0 ; i--) {
- struct pipe_ctx *pipe_ctx_old =
- &dc->current_state->res_ctx.pipe_ctx[i];
- struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
-
- /*if (!pipe_ctx_old->stream)
- continue;*/
-
- if (pipe_ctx->stream && pipe_ctx->plane_state
- && !pipe_need_reprogram(pipe_ctx_old, pipe_ctx))
- continue;
-
- plane_atomic_disable(dc, i);
-
- if (!pipe_ctx->stream || !pipe_ctx->plane_state)
- plane_atomic_power_down(dc, i);
- }
-
/* Reset Back End*/
for (i = dc->res_pool->pipe_count - 1; i >= 0 ; i--) {
struct pipe_ctx *pipe_ctx_old =
--
2.14.1
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