[PATCH] drm/amdgpu/gfx9: properly set the hdp flush reg for Raven

[Zhang, Jerry (Junwei)]

On 09/02/2017 02:18 PM, Alex Deucher wrote:
> Was only being assigned for vega10.
>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang at amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 +++-
>   1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 66f92c8..7ff6240 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -3514,7 +3514,9 @@ static void gfx_v9_0_ring_emit_hdp_flush(struct amdgpu_ring *ring)
>   	u32 ref_and_mask, reg_mem_engine;
>   	struct nbio_hdp_flush_reg *nbio_hf_reg;
>
> -	if (ring->adev->asic_type == CHIP_VEGA10)
> +	if (ring->adev->flags & AMD_IS_APU)
> +		nbio_hf_reg = &nbio_v7_0_hdp_flush_reg;
> +	else
>   		nbio_hf_reg = &nbio_v6_1_hdp_flush_reg;
>
>   	if (ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE) {
>