[PATCH umr 4/4] Fix the no-kernel case of wave SGPR reading

Nicolai Hähnle nhaehnle at gmail.com
Sat Sep 9 10:55:30 UTC 2017


From: Nicolai Hähnle <nicolai.haehnle at amd.com>

Signed-off-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
---
 src/lib/read_gpr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/lib/read_gpr.c b/src/lib/read_gpr.c
index 669a49b..e6138a9 100644
--- a/src/lib/read_gpr.c
+++ b/src/lib/read_gpr.c
@@ -68,21 +68,21 @@ int umr_read_sgprs(struct umr_asic *asic, struct umr_wave_status *ws, uint32_t *
 			((uint64_t)ws->hw_id.sh_id << 20)        |
 			((uint64_t)ws->hw_id.cu_id << 28)        |
 			((uint64_t)ws->hw_id.wave_id << 36)      |
 			((uint64_t)ws->hw_id.simd_id << 44)      |
 			(0ULL << 52); // thread_id
 
 		lseek(asic->fd.gpr, addr, SEEK_SET);
 		return read(asic->fd.gpr, dst, 4 * ((ws->gpr_alloc.sgpr_size + 1) << shift));
 	} else {
 		umr_grbm_select_index(asic, ws->hw_id.se_id, ws->hw_id.sh_id, ws->hw_id.cu_id);
-		wave_read_regs_via_mmio(asic, ws->hw_id.simd_id, ws->hw_id.wave_id, 0, 0,
+		wave_read_regs_via_mmio(asic, ws->hw_id.simd_id, ws->hw_id.wave_id, 0, 0x200,
 					(ws->gpr_alloc.sgpr_size + 1) << shift, dst);
 		umr_grbm_select_index(asic, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF);
 		return 0;
 	}
 }
 
 
 int umr_read_vgprs(struct umr_asic *asic, struct umr_wave_status *ws, uint32_t thread, uint32_t *dst)
 {
 	uint64_t addr;
-- 
2.11.0



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