[PATCH] drm/amdgpu/gfx9: implement wave VGPR reading

[Christian König]

Am 09.09.2017 um 12:49 schrieb Nicolai Hähnle:
> From: Nicolai Hähnle <nicolai.haehnle at amd.com>
>
> This is already hooked up to the "amdgpu_gpr" debugfs file used by
> the umr userspace debugging tool.
>
> Signed-off-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

Acked-by: Christian König <christian.koenig at amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 10 ++++++++++
>   1 file changed, 10 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index d1c8729a3534..8956f3ab271a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -929,26 +929,36 @@ static void gfx_v9_0_read_wave_data(struct amdgpu_device *adev, uint32_t simd, u
>   
>   static void gfx_v9_0_read_wave_sgprs(struct amdgpu_device *adev, uint32_t simd,
>   				     uint32_t wave, uint32_t start,
>   				     uint32_t size, uint32_t *dst)
>   {
>   	wave_read_regs(
>   		adev, simd, wave, 0,
>   		start + SQIND_WAVE_SGPRS_OFFSET, size, dst);
>   }
>   
> +static void gfx_v9_0_read_wave_vgprs(struct amdgpu_device *adev, uint32_t simd,
> +				     uint32_t wave, uint32_t thread,
> +				     uint32_t start, uint32_t size,
> +				     uint32_t *dst)
> +{
> +	wave_read_regs(
> +		adev, simd, wave, thread,
> +		start + SQIND_WAVE_VGPRS_OFFSET, size, dst);
> +}
>   
>   static const struct amdgpu_gfx_funcs gfx_v9_0_gfx_funcs = {
>   	.get_gpu_clock_counter = &gfx_v9_0_get_gpu_clock_counter,
>   	.select_se_sh = &gfx_v9_0_select_se_sh,
>   	.read_wave_data = &gfx_v9_0_read_wave_data,
>   	.read_wave_sgprs = &gfx_v9_0_read_wave_sgprs,
> +	.read_wave_vgprs = &gfx_v9_0_read_wave_vgprs,
>   };
>   
>   static void gfx_v9_0_gpu_early_init(struct amdgpu_device *adev)
>   {
>   	u32 gb_addr_config;
>   
>   	adev->gfx.funcs = &gfx_v9_0_gfx_funcs;
>   
>   	switch (adev->asic_type) {
>   	case CHIP_VEGA10: