[PATCH 2/5] drm/amdgpu: add syncfile chunk support

[Chunming Zhou]

Change-Id: I9a9e8d474c2f31e71bdf9841a518fa48b3e5c33b
Signed-off-by: Chunming Zhou <David1.Zhou at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 63 +++++++++++++++++++++-------------
 include/uapi/drm/amdgpu_drm.h          |  3 ++
 2 files changed, 42 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 3b049a4..d048802 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -155,6 +155,7 @@ static int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, void *data)
 			break;
 
 		case AMDGPU_CHUNK_ID_DEPENDENCIES:
+		case AMDGPU_CHUNK_ID_SYNCFILE:
 			break;
 
 		default:
@@ -983,34 +984,47 @@ static int amdgpu_cs_process_fence_dep(struct amdgpu_cs_parser *p,
 		sizeof(struct drm_amdgpu_cs_chunk_dep);
 
 	for (i = 0; i < num_deps; ++i) {
-		struct amdgpu_ring *ring;
-		struct amdgpu_ctx *ctx;
-		struct dma_fence *fence;
+		if (chunk->chunk_id == AMDGPU_CHUNK_ID_DEPENDENCIES) {
+			struct amdgpu_ring *ring;
+			struct amdgpu_ctx *ctx;
+			struct dma_fence *fence;
 
-		ctx = amdgpu_ctx_get(fpriv, deps[i].ctx_id);
-		if (ctx == NULL)
-			return -EINVAL;
+			ctx = amdgpu_ctx_get(fpriv, deps[i].ctx_id);
+			if (ctx == NULL)
+				return -EINVAL;
 
-		r = amdgpu_queue_mgr_map(p->adev, &ctx->queue_mgr,
-					 deps[i].ip_type,
-					 deps[i].ip_instance,
-					 deps[i].ring, &ring);
-		if (r) {
-			amdgpu_ctx_put(ctx);
-			return r;
-		}
+			r = amdgpu_queue_mgr_map(p->adev, &ctx->queue_mgr,
+						deps[i].ip_type,
+						deps[i].ip_instance,
+						deps[i].ring, &ring);
+			if (r) {
+				amdgpu_ctx_put(ctx);
+				return r;
+			}
 
-		fence = amdgpu_ctx_get_fence(ctx, ring,
-					     deps[i].handle);
-		if (IS_ERR(fence)) {
-			r = PTR_ERR(fence);
-			amdgpu_ctx_put(ctx);
-			return r;
-		} else if (fence) {
+			fence = amdgpu_ctx_get_fence(ctx, ring,
+						deps[i].handle);
+			if (IS_ERR(fence)) {
+				r = PTR_ERR(fence);
+				amdgpu_ctx_put(ctx);
+				return r;
+			} else if (fence) {
+				r = amdgpu_sync_fence(p->adev, &p->job->sync,
+							fence);
+				dma_fence_put(fence);
+				amdgpu_ctx_put(ctx);
+				if (r)
+					return r;
+			}
+		} else if (chunk->chunk_id == AMDGPU_CHUNK_ID_SYNCFILE) {
+			struct dma_fence *fence;
+
+			WARN_ONCE(deps[i].sf_fd < 0,
+				  "invalid syncfile fd handle!");
+			fence = sync_file_get_fence(deps[i].sf_fd);
 			r = amdgpu_sync_fence(p->adev, &p->job->sync,
-					      fence);
+						fence);
 			dma_fence_put(fence);
-			amdgpu_ctx_put(ctx);
 			if (r)
 				return r;
 		}
@@ -1028,7 +1042,8 @@ static int amdgpu_cs_dependencies(struct amdgpu_device *adev,
 
 		chunk = &p->chunks[i];
 
-		if (chunk->chunk_id == AMDGPU_CHUNK_ID_DEPENDENCIES) {
+		if ((chunk->chunk_id == AMDGPU_CHUNK_ID_DEPENDENCIES) ||
+			(chunk->chunk_id == AMDGPU_CHUNK_ID_SYNCFILE)) {
 			r = amdgpu_cs_process_fence_dep(p, chunk);
 			if (r)
 				return r;
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index d0cd4f0..19b4fea 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -511,6 +511,7 @@ struct drm_amdgpu_gem_va {
 #define AMDGPU_CHUNK_ID_IB		0x01
 #define AMDGPU_CHUNK_ID_FENCE		0x02
 #define AMDGPU_CHUNK_ID_DEPENDENCIES	0x03
+#define AMDGPU_CHUNK_ID_SYNCFILE	0x04
 
 struct drm_amdgpu_cs_chunk {
 	__u32		chunk_id;
@@ -573,6 +574,8 @@ struct drm_amdgpu_cs_chunk_dep {
 	__u32 ring;
 	__u32 ctx_id;
 	__u64 handle;
+	int32_t sf_fd;
+	int32_t _pad;
 };
 
 struct drm_amdgpu_cs_chunk_fence {
-- 
1.9.1