[PATCH 4/4] drm/amd/powerplay: fix pcie max lane define error

[Deucher, Alexander]

> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf
> Of Rex Zhu
> Sent: Wednesday, September 13, 2017 9:09 AM
> To: amd-gfx at lists.freedesktop.org
> Cc: Zhu, Rex
> Subject: [PATCH 4/4] drm/amd/powerplay: fix pcie max lane define error
> 
> Change-Id: I307465ec2fe8fe02e19c76d979be0a1af30fed0c
> Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
> b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
> index 629990f..57a0467 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h
> @@ -297,7 +297,7 @@ enum PP_PCIEGen {
>  #define PP_Min_PCIEGen     PP_PCIEGen1
>  #define PP_Max_PCIEGen     PP_PCIEGen3
>  #define PP_Min_PCIELane    1
> -#define PP_Max_PCIELane    32
> +#define PP_Max_PCIELane    16
> 
>  enum phm_clock_Type {
>  	PHM_DispClock = 1,
> --
> 1.9.1
> 
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