[PATCH 12/18] drm/amdgpu:use formal register to trigger hdp invalidate
Christian König
christian.koenig at amd.com
Tue Sep 19 08:30:31 UTC 2017
I don't know why, but the HDP is generally not part of the register spec.
So you can neither find HDP_DEBUG0 nor HDP_READ_CACHE_INVALIDATE in it
as far as I know.
Point is that the HDP invalidates it's read cache on any register write
(the register itself doesn't matter). So far we used the HDP_DEBUG0
register because it is unused otherwise, but having a dedicated register
just for this job is clearly a good idea.
Regards,
Christian.
Am 19.09.2017 um 09:02 schrieb zhoucm1:
> >using this register to replace MM_HDP_DEBUG0 is suggested from a HDP
> HW guys
>
> I'm OK with this line.
>
> Thanks for explain.
> David Zhou
>
> On 2017年09月19日 15:00, Liu, Monk wrote:
>> First, I didn't check if windows did this way or not, because I don't
>> sure if windows is always doing the right thing, e.g. for GFX
>> preemption I didn't copy windows scheme and we found couple bugs in
>> windows but not in linux ...
>> So please don't assume we should copy from windows, unless it's solid
>> like a dead bone
>>
>> Second, this register is originally comes from the definition file
>> "hdp_4_0_offset.h", not recently introduced by me or someone else,
>> and using this register to replace MM_HDP_DEBUG0 is suggested from a
>> HDP HW guys when
>> I was working on the PAL/VULKAN preemption hang issue in Orlando,
>> sorry I missed that guy's name ...
>>
>> @Deucher, Alexander do you know who is on hdp hw ? we can confirm
>> with him
>>
>>
>> If you're feeling bad about this change, I can add "if sriov"
>> condition to all of it, so bare-metal will keep still, is that okay ?
>>
>> BR Monk
>>
>>
>> -----Original Message-----
>> From: Zhou, David(ChunMing)
>> Sent: 2017年9月19日 14:51
>> To: Liu, Monk <Monk.Liu at amd.com>; Koenig, Christian
>> <Christian.Koenig at amd.com>; amd-gfx at lists.freedesktop.org
>> Subject: Re: [PATCH 12/18] drm/amdgpu:use formal register to trigger
>> hdp invalidate
>>
>>
>> Seems the change is more proper, but where do you find
>> mmHDP_READ_CACHE_INVALIDATE? Could you double check if Windows driver
>> has changed to use this?
>> I'm confusing it, since mmHDP_DEBUG0 implementation is from windows
>> as well.
>> I even don't find mmHDP_READ_CACHE_INVALIDATE in register spec.
>>
>> Regards,
>> David Zhou
>> On 2017年09月19日 14:46, Liu, Monk wrote:
>>> What question ? please reply here
>>>
>>> -----Original Message-----
>>> From: Zhou, David(ChunMing)
>>> Sent: 2017年9月19日 12:25
>>> To: Liu, Monk <Monk.Liu at amd.com>; Koenig, Christian
>>> <Christian.Koenig at amd.com>; amd-gfx at lists.freedesktop.org
>>> Subject: RE: [PATCH 12/18] drm/amdgpu:use formal register to trigger
>>> hdp invalidate
>>>
>>> Please answer my question as I raised in another thread, otherwise I
>>> will give a NAK on this!
>>>
>>> Regards,
>>> David Zhou
>>>
>>> -----Original Message-----
>>> From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf
>>> Of Liu, Monk
>>> Sent: Tuesday, September 19, 2017 12:04 PM
>>> To: Koenig, Christian <Christian.Koenig at amd.com>;
>>> amd-gfx at lists.freedesktop.org
>>> Subject: RE: [PATCH 12/18] drm/amdgpu:use formal register to trigger
>>> hdp invalidate
>>>
>>> Yeah, vnc1_0 and uvd_v7_0
>>>
>>> Thanks
>>>
>>> -----Original Message-----
>>> From: Koenig, Christian
>>> Sent: 2017年9月18日 19:39
>>> To: Liu, Monk <Monk.Liu at amd.com>; amd-gfx at lists.freedesktop.org
>>> Subject: Re: [PATCH 12/18] drm/amdgpu:use formal register to trigger
>>> hdp invalidate
>>>
>>> Yeah, but Vega10 has UVD7 and in uvd_v7_0.c we have:
>>>
>>>> static void uvd_v7_0_ring_emit_hdp_invalidate(struct amdgpu_ring
>>>> *ring) {
>>>> amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(HDP, 0,
>>>> mmHDP_DEBUG0), 0));
>>>> amdgpu_ring_write(ring, 1);
>>>> }
>>> That should probably be fixed as well.
>>>
>>> Regards,
>>> Christian.
>>>
>>> Am 18.09.2017 um 13:03 schrieb Liu, Monk:
>>>> Only vega10 has this register
>>>>
>>>> -----Original Message-----
>>>> From: Christian König [mailto:ckoenig.leichtzumerken at gmail.com]
>>>> Sent: 2017年9月18日 17:20
>>>> To: Liu, Monk <Monk.Liu at amd.com>; amd-gfx at lists.freedesktop.org
>>>> Subject: Re: [PATCH 12/18] drm/amdgpu:use formal register to trigger
>>>> hdp invalidate
>>>>
>>>> Am 18.09.2017 um 08:11 schrieb Monk Liu:
>>>>> Change-Id: I61dc02ea6a450f9acfa3bae07aa20244261f5369
>>>>> Signed-off-by: Monk Liu <Monk.Liu at amd.com>
>>>> Reviewed-by: Christian König <christian.koenig at amd.com>
>>>>
>>>> Please scan the code once more, we most likely have used
>>>> mmHDP_DEBUG0 for this at even more places.
>>>>
>>>> Christian.
>>>>
>>>>> ---
>>>>> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +-
>>>>> drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 2 +-
>>>>> 2 files changed, 2 insertions(+), 2 deletions(-)
>>>>>
>>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>>>>> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>>>>> index f201510..44960b3 100644
>>>>> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>>>>> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>>>>> @@ -3549,7 +3549,7 @@ static void
>>>>> gfx_v9_0_ring_emit_hdp_flush(struct amdgpu_ring *ring)
>>>>> static void gfx_v9_0_ring_emit_hdp_invalidate(struct
>>>>> amdgpu_ring *ring)
>>>>> {
>>>>> gfx_v9_0_write_data_to_reg(ring, 0, true,
>>>>> - SOC15_REG_OFFSET(HDP, 0, mmHDP_DEBUG0), 1);
>>>>> + SOC15_REG_OFFSET(HDP, 0,
>>>>> mmHDP_READ_CACHE_INVALIDATE), 1);
>>>>> }
>>>>> static void gfx_v9_0_ring_emit_ib_gfx(struct amdgpu_ring
>>>>> *ring,
>>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
>>>>> b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
>>>>> index fd7c72a..d5f3848 100644
>>>>> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
>>>>> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
>>>>> @@ -398,7 +398,7 @@ static void
>>>>> sdma_v4_0_ring_emit_hdp_invalidate(struct amdgpu_ring *ring)
>>>>> {
>>>>> amdgpu_ring_write(ring,
>>>>> SDMA_PKT_HEADER_OP(SDMA_OP_SRBM_WRITE) |
>>>>> SDMA_PKT_SRBM_WRITE_HEADER_BYTE_EN(0xf));
>>>>> - amdgpu_ring_write(ring, SOC15_REG_OFFSET(HDP, 0, mmHDP_DEBUG0));
>>>>> + amdgpu_ring_write(ring, SOC15_REG_OFFSET(HDP, 0,
>>>>> +mmHDP_READ_CACHE_INVALIDATE));
>>>>> amdgpu_ring_write(ring, 1);
>>>>> }
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