[PATCH 04/18] drm/amd/powerplay: use SMU_IND_INDEX/DATA_11 pair in VFPF macros to support virtualization

Rex Zhu Rex.Zhu at amd.com
Wed Sep 20 11:44:04 UTC 2017


Change-Id: I81163535116224db66b20d0afe33909aa1d4bf11
Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
---
 drivers/gpu/drm/amd/powerplay/inc/smumgr.h    | 4 ++--
 drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/inc/smumgr.h b/drivers/gpu/drm/amd/powerplay/inc/smumgr.h
index 8bdffaa..54b151b 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/smumgr.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/smumgr.h
@@ -195,12 +195,12 @@ extern int smum_populate_requested_graphic_levels(struct pp_hwmgr *hwmgr,
 #define SMUM_WAIT_VFPF_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr,		\
 				port, index, value, mask)		\
 	smum_wait_on_indirect_register(hwmgr,				\
-		mm##port##_INDEX_0, index, value, mask)
+		mm##port##_INDEX_11, index, value, mask)
 
 #define SMUM_WAIT_VFPF_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr,	\
 				port, index, value, mask)		\
 	smum_wait_for_indirect_register_unequal(hwmgr,			\
-		mm##port##_INDEX_0, index, value, mask)
+		mm##port##_INDEX_11, index, value, mask)
 
 
 #define SMUM_WAIT_VFPF_INDIRECT_REGISTER(hwmgr, port, reg, value, mask) \
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c b/drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c
index 87c8d9e..b28e4e9 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c
@@ -2344,7 +2344,7 @@ static int ci_upload_firmware(struct pp_hwmgr *hwmgr)
 		pr_info("smc is running, no need to load smc firmware\n");
 		return 0;
 	}
-	SMUM_WAIT_VFPF_INDIRECT_FIELD(hwmgr, SMC_IND, RCU_UC_EVENTS,
+	PHM_WAIT_INDIRECT_FIELD(hwmgr, SMC_IND, RCU_UC_EVENTS,
 			boot_seq_done, 1);
 	PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_MISC_CNTL,
 			pre_fetcher_en, 1);
-- 
1.9.1



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