[PATCH 09/18] drm/amd/powerplay: delete SMU_WRITE_INDIRECT_FIELD
Rex Zhu
Rex.Zhu at amd.com
Wed Sep 20 11:44:09 UTC 2017
the macro is as same as PHM_WRITE_INDIRECT_FIELD
Change-Id: I62389ad2d699530e3a7d6a81f7427c21fd88b7be
Signed-off-by: Rex Zhu <Rex.Zhu at amd.com>
---
drivers/gpu/drm/amd/powerplay/inc/smumgr.h | 15 ---------------
drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c | 4 ++--
drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c | 8 ++++----
3 files changed, 6 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/inc/smumgr.h b/drivers/gpu/drm/amd/powerplay/inc/smumgr.h
index 099758d..d065aa7 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/smumgr.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/smumgr.h
@@ -193,11 +193,6 @@ extern int smum_populate_requested_graphic_levels(struct pp_hwmgr *hwmgr,
SMUM_GET_FIELD(cgs_read_ind_register(device, port, ix##reg), \
reg, field)
-
-
-
-
-
/*Operations on named fields.*/
#define SMUM_READ_VFPF_INDIRECT_FIELD(device, port, reg, field) \
@@ -213,14 +208,4 @@ extern int smum_populate_requested_graphic_levels(struct pp_hwmgr *hwmgr,
SMUM_SET_FIELD(cgs_read_ind_register(device, port, ix##reg), \
reg, field, fieldval))
-
-#define SMUM_WRITE_INDIRECT_FIELD(device, port, reg, field, fieldval) \
- cgs_write_ind_register(device, port, ix##reg, \
- SMUM_SET_FIELD(cgs_read_ind_register(device, port, ix##reg), \
- reg, field, fieldval))
-
-
-
-
-
#endif
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c b/drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c
index b28e4e9..e867094 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/ci_smc.c
@@ -1933,9 +1933,9 @@ static int ci_start_smc(struct pp_hwmgr *hwmgr)
ci_program_jump_on_start(hwmgr);
/* enable smc clock */
- SMUM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0);
+ PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_CLOCK_CNTL_0, ck_disable, 0);
- SMUM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_RESET_CNTL, rst_reg, 0);
+ PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_RESET_CNTL, rst_reg, 0);
SMUM_WAIT_INDIRECT_FIELD(hwmgr, SMC_IND, FIRMWARE_FLAGS,
INTERRUPTS_ENABLED, 1);
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c
index 3a134ea..fe57335 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c
@@ -41,7 +41,7 @@
static int iceland_start_smc(struct pp_hwmgr *hwmgr)
{
- SMUM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
+ PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
SMC_SYSCON_RESET_CNTL, rst_reg, 0);
return 0;
@@ -49,7 +49,7 @@ static int iceland_start_smc(struct pp_hwmgr *hwmgr)
static void iceland_reset_smc(struct pp_hwmgr *hwmgr)
{
- SMUM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
+ PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
SMC_SYSCON_RESET_CNTL,
rst_reg, 1);
}
@@ -57,14 +57,14 @@ static void iceland_reset_smc(struct pp_hwmgr *hwmgr)
static void iceland_stop_smc_clock(struct pp_hwmgr *hwmgr)
{
- SMUM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
+ PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
SMC_SYSCON_CLOCK_CNTL_0,
ck_disable, 1);
}
static void iceland_start_smc_clock(struct pp_hwmgr *hwmgr)
{
- SMUM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
+ PHM_WRITE_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
SMC_SYSCON_CLOCK_CNTL_0,
ck_disable, 0);
}
--
1.9.1
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